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https://github.com/edk2-porting/linux-next.git
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0bbd5f4e97
Adds a new ioatdma driver Signed-off-by: Chris Leech <christopher.leech@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
119 lines
3.5 KiB
C
119 lines
3.5 KiB
C
/*
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* Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 59
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* Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called COPYING.
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*/
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#ifndef IOATDMA_IO_H
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#define IOATDMA_IO_H
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#include <asm/io.h>
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/*
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* device and per-channel MMIO register read and write functions
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* this is a lot of anoying inline functions, but it's typesafe
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*/
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static inline u8 ioatdma_read8(struct ioat_device *device,
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unsigned int offset)
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{
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return readb(device->reg_base + offset);
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}
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static inline u16 ioatdma_read16(struct ioat_device *device,
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unsigned int offset)
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{
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return readw(device->reg_base + offset);
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}
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static inline u32 ioatdma_read32(struct ioat_device *device,
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unsigned int offset)
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{
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return readl(device->reg_base + offset);
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}
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static inline void ioatdma_write8(struct ioat_device *device,
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unsigned int offset, u8 value)
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{
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writeb(value, device->reg_base + offset);
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}
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static inline void ioatdma_write16(struct ioat_device *device,
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unsigned int offset, u16 value)
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{
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writew(value, device->reg_base + offset);
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}
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static inline void ioatdma_write32(struct ioat_device *device,
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unsigned int offset, u32 value)
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{
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writel(value, device->reg_base + offset);
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}
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static inline u8 ioatdma_chan_read8(struct ioat_dma_chan *chan,
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unsigned int offset)
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{
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return readb(chan->reg_base + offset);
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}
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static inline u16 ioatdma_chan_read16(struct ioat_dma_chan *chan,
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unsigned int offset)
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{
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return readw(chan->reg_base + offset);
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}
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static inline u32 ioatdma_chan_read32(struct ioat_dma_chan *chan,
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unsigned int offset)
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{
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return readl(chan->reg_base + offset);
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}
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static inline void ioatdma_chan_write8(struct ioat_dma_chan *chan,
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unsigned int offset, u8 value)
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{
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writeb(value, chan->reg_base + offset);
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}
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static inline void ioatdma_chan_write16(struct ioat_dma_chan *chan,
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unsigned int offset, u16 value)
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{
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writew(value, chan->reg_base + offset);
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}
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static inline void ioatdma_chan_write32(struct ioat_dma_chan *chan,
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unsigned int offset, u32 value)
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{
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writel(value, chan->reg_base + offset);
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}
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#if (BITS_PER_LONG == 64)
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static inline u64 ioatdma_chan_read64(struct ioat_dma_chan *chan,
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unsigned int offset)
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{
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return readq(chan->reg_base + offset);
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}
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static inline void ioatdma_chan_write64(struct ioat_dma_chan *chan,
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unsigned int offset, u64 value)
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{
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writeq(value, chan->reg_base + offset);
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}
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#endif
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#endif /* IOATDMA_IO_H */
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