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fac99d9746
generic__raw_read_trylock() was broken, fix up the __raw_read_trylock() implementation for something sensible. Taken from m32r, which has the same use cases. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
115 lines
2.5 KiB
C
115 lines
2.5 KiB
C
/*
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* include/asm-sh/spinlock.h
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*
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* Copyright (C) 2002, 2003 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef __ASM_SH_SPINLOCK_H
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#define __ASM_SH_SPINLOCK_H
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#include <asm/atomic.h>
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/*
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* Your basic SMP spinlocks, allowing only a single CPU anywhere
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*/
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#define __raw_spin_is_locked(x) ((x)->lock != 0)
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#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
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#define __raw_spin_unlock_wait(x) \
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do { cpu_relax(); } while (__raw_spin_is_locked(x))
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/*
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* Simple spin lock operations. There are two variants, one clears IRQ's
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* on the local processor, one does not.
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*
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* We make no fairness assumptions. They have a cost.
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*/
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static inline void __raw_spin_lock(raw_spinlock_t *lock)
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{
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__asm__ __volatile__ (
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"1:\n\t"
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"tas.b @%0\n\t"
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"bf/s 1b\n\t"
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"nop\n\t"
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: "=r" (lock->lock)
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: "r" (&lock->lock)
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: "t", "memory"
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);
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}
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static inline void __raw_spin_unlock(raw_spinlock_t *lock)
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{
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assert_spin_locked(lock);
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lock->lock = 0;
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}
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#define __raw_spin_trylock(x) (!test_and_set_bit(0, &(x)->lock))
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/*
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* Read-write spinlocks, allowing multiple readers but only one writer.
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*
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* NOTE! it is quite common to have readers in interrupts but no interrupt
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* writers. For those circumstances we can "mix" irq-safe locks - any writer
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* needs to get a irq-safe write-lock, but readers can get non-irqsafe
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* read-locks.
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*/
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static inline void __raw_read_lock(raw_rwlock_t *rw)
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{
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__raw_spin_lock(&rw->lock);
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atomic_inc(&rw->counter);
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__raw_spin_unlock(&rw->lock);
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}
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static inline void __raw_read_unlock(raw_rwlock_t *rw)
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{
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__raw_spin_lock(&rw->lock);
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atomic_dec(&rw->counter);
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__raw_spin_unlock(&rw->lock);
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}
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static inline void __raw_write_lock(raw_rwlock_t *rw)
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{
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__raw_spin_lock(&rw->lock);
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atomic_set(&rw->counter, -1);
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}
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static inline void __raw_write_unlock(raw_rwlock_t *rw)
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{
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atomic_set(&rw->counter, 0);
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__raw_spin_unlock(&rw->lock);
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}
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static inline int __raw_read_trylock(raw_rwlock_t *lock)
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{
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atomic_t *count = (atomic_t*)lock;
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if (atomic_dec_return(count) >= 0)
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return 1;
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atomic_inc(count);
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return 0;
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}
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static inline int __raw_write_trylock(raw_rwlock_t *rw)
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{
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if (atomic_sub_and_test(RW_LOCK_BIAS, &rw->counter))
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return 1;
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atomic_add(RW_LOCK_BIAS, &rw->counter);
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return 0;
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}
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#define _raw_spin_relax(lock) cpu_relax()
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#define _raw_read_relax(lock) cpu_relax()
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#define _raw_write_relax(lock) cpu_relax()
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#endif /* __ASM_SH_SPINLOCK_H */
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