mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-29 07:34:06 +08:00
eb71d4dec4
Some newer Atom CPUs, eg Avoton and Bay Trail, use slightly different register layouts for the iTCO than the current v1 and v2 iTCO. Differences from previous iTCO versions include: - The ACPI space is enabled in the "ACPI base address" register instead of the "ACPI control register" - The "no reboot" functionality is set in the "Power Management Configuration" register instead of the "General Control and Status" (GCS) register or PCI configuration space. - The "ACPI Control Register" is not present on v3. The "Power Management Configuration Base Address" register resides at the same address is Avoton/Bay Trail. To differentiate these newer chipsets create a new v3 iTCO version and update the MFD driver to support them. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Tested-by: Rajat Jain <rajatjain@juniper.net> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Lee Jones <lee.jones@linaro.org>
53 lines
1.3 KiB
C
53 lines
1.3 KiB
C
/*
|
|
* linux/drivers/mfd/lpc_ich.h
|
|
*
|
|
* Copyright (c) 2012 Extreme Engineering Solution, Inc.
|
|
* Author: Aaron Sierra <asierra@xes-inc.com>
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License 2 as published
|
|
* by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program; see the file COPYING. If not, write to
|
|
* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
|
|
*/
|
|
#ifndef LPC_ICH_H
|
|
#define LPC_ICH_H
|
|
|
|
/* Watchdog resources */
|
|
#define ICH_RES_IO_TCO 0
|
|
#define ICH_RES_IO_SMI 1
|
|
#define ICH_RES_MEM_OFF 2
|
|
#define ICH_RES_MEM_GCS_PMC 0
|
|
|
|
/* GPIO resources */
|
|
#define ICH_RES_GPIO 0
|
|
#define ICH_RES_GPE0 1
|
|
|
|
/* GPIO compatibility */
|
|
enum {
|
|
ICH_I3100_GPIO,
|
|
ICH_V5_GPIO,
|
|
ICH_V6_GPIO,
|
|
ICH_V7_GPIO,
|
|
ICH_V9_GPIO,
|
|
ICH_V10CORP_GPIO,
|
|
ICH_V10CONS_GPIO,
|
|
AVOTON_GPIO,
|
|
};
|
|
|
|
struct lpc_ich_info {
|
|
char name[32];
|
|
unsigned int iTCO_version;
|
|
unsigned int gpio_version;
|
|
u8 use_gpio;
|
|
};
|
|
|
|
#endif
|