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3c4fe763d6
The rate of the parent should not be multiplied by 2 when the pll has a
fractional part. This is making the rate calculation of the gxl_hdmi_pll
wrong (and others as well). This multiplication is specific
to the hdmi_pll of gxbb and is most likely due to a multiplier sitting
in front of this particular pll.
Add a fixed factor clock in front on the gxbb pll and remove this constant
from the calculation to fix the problem
Fixes:
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.. | ||
axg.c | ||
axg.h | ||
clk-audio-divider.c | ||
clk-cpu.c | ||
clk-mpll.c | ||
clk-pll.c | ||
clkc.h | ||
gxbb-aoclk-32k.c | ||
gxbb-aoclk-regmap.c | ||
gxbb-aoclk.c | ||
gxbb-aoclk.h | ||
gxbb.c | ||
gxbb.h | ||
Kconfig | ||
Makefile | ||
meson8b.c | ||
meson8b.h |