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The Synchronous Audio Interface (SAI) instances are clocked by independent clocks: The bus clock and the audio clock (as shown in Figure 51-1 in the Vybrid Reference Manual). The clock gates in CCGR0/CCGR1 for SAI0 through SAI3 are bus clock gates, as access tests to the registers with/without gating those clocks have shown. The audio clock is gated by the SAIx_EN gates in CCM_CSCDR1, followed by a clock divider (SAIx_DIV). Currently, the parent of the bus clock gates has been assigned to SAIx_DIV, which is not involved in the bus clock path for the SAI instances (see chapter 9.10.12, SAI clocking in the Vybrid Reference Manual). Fix this by define the parent clock of VF610_CLK_SAIx to be the bus clock. If the driver needs the audio clock (when used in master mode), a fixed device tree is required which assign the audio clock properly to VF610_CLK_SAIx_DIV. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
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.. | ||
clk-busy.c | ||
clk-cpu.c | ||
clk-fixup-div.c | ||
clk-fixup-mux.c | ||
clk-gate2.c | ||
clk-gate-exclusive.c | ||
clk-imx1.c | ||
clk-imx6q.c | ||
clk-imx6sl.c | ||
clk-imx6sx.c | ||
clk-imx6ul.c | ||
clk-imx7d.c | ||
clk-imx21.c | ||
clk-imx25.c | ||
clk-imx27.c | ||
clk-imx31.c | ||
clk-imx35.c | ||
clk-imx51-imx53.c | ||
clk-pfd.c | ||
clk-pllv1.c | ||
clk-pllv2.c | ||
clk-pllv3.c | ||
clk-vf610.c | ||
clk.c | ||
clk.h | ||
Makefile |