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4180bf1b65
Using hypercall to send IPIs by one vmexit instead of one by one for
xAPIC/x2APIC physical mode and one vmexit per-cluster for x2APIC cluster
mode. Intel guest can enter x2apic cluster mode when interrupt remmaping
is enabled in qemu, however, latest AMD EPYC still just supports xapic
mode which can get great improvement by Exit-less IPIs. This patchset
lets a guest send multicast IPIs, with at most 128 destinations per
hypercall in 64-bit mode and 64 vCPUs per hypercall in 32-bit mode.
Hardware: Xeon Skylake 2.5GHz, 2 sockets, 40 cores, 80 threads, the VM
is 80 vCPUs, IPI microbenchmark(https://lkml.org/lkml/2017/12/19/141):
x2apic cluster mode, vanilla
Dry-run: 0, 2392199 ns
Self-IPI: 6907514, 15027589 ns
Normal IPI: 223910476, 251301666 ns
Broadcast IPI: 0, 9282161150 ns
Broadcast lock: 0, 8812934104 ns
x2apic cluster mode, pv-ipi
Dry-run: 0, 2449341 ns
Self-IPI: 6720360, 15028732 ns
Normal IPI: 228643307, 255708477 ns
Broadcast IPI: 0, 7572293590 ns => 22% performance boost
Broadcast lock: 0, 8316124651 ns
x2apic physical mode, vanilla
Dry-run: 0, 3135933 ns
Self-IPI: 8572670
, 17901757 ns
Normal IPI: 226444334, 255421709 ns
Broadcast IPI: 0, 19845070887 ns
Broadcast lock: 0, 19827383656 ns
x2apic physical mode, pv-ipi
Dry-run: 0, 2446381 ns
Self-IPI: 6788217, 15021056 ns
Normal IPI: 219454441, 249583458 ns
Broadcast IPI: 0, 7806540019 ns => 154% performance boost
Broadcast lock: 0, 9143618799 ns
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Cc: Vitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
144 lines
4.9 KiB
Plaintext
144 lines
4.9 KiB
Plaintext
Linux KVM Hypercall:
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===================
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X86:
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KVM Hypercalls have a three-byte sequence of either the vmcall or the vmmcall
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instruction. The hypervisor can replace it with instructions that are
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guaranteed to be supported.
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Up to four arguments may be passed in rbx, rcx, rdx, and rsi respectively.
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The hypercall number should be placed in rax and the return value will be
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placed in rax. No other registers will be clobbered unless explicitly stated
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by the particular hypercall.
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S390:
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R2-R7 are used for parameters 1-6. In addition, R1 is used for hypercall
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number. The return value is written to R2.
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S390 uses diagnose instruction as hypercall (0x500) along with hypercall
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number in R1.
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For further information on the S390 diagnose call as supported by KVM,
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refer to Documentation/virtual/kvm/s390-diag.txt.
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PowerPC:
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It uses R3-R10 and hypercall number in R11. R4-R11 are used as output registers.
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Return value is placed in R3.
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KVM hypercalls uses 4 byte opcode, that are patched with 'hypercall-instructions'
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property inside the device tree's /hypervisor node.
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For more information refer to Documentation/virtual/kvm/ppc-pv.txt
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MIPS:
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KVM hypercalls use the HYPCALL instruction with code 0 and the hypercall
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number in $2 (v0). Up to four arguments may be placed in $4-$7 (a0-a3) and
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the return value is placed in $2 (v0).
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KVM Hypercalls Documentation
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===========================
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The template for each hypercall is:
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1. Hypercall name.
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2. Architecture(s)
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3. Status (deprecated, obsolete, active)
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4. Purpose
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1. KVM_HC_VAPIC_POLL_IRQ
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------------------------
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Architecture: x86
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Status: active
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Purpose: Trigger guest exit so that the host can check for pending
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interrupts on reentry.
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2. KVM_HC_MMU_OP
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------------------------
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Architecture: x86
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Status: deprecated.
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Purpose: Support MMU operations such as writing to PTE,
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flushing TLB, release PT.
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3. KVM_HC_FEATURES
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------------------------
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Architecture: PPC
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Status: active
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Purpose: Expose hypercall availability to the guest. On x86 platforms, cpuid
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used to enumerate which hypercalls are available. On PPC, either device tree
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based lookup ( which is also what EPAPR dictates) OR KVM specific enumeration
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mechanism (which is this hypercall) can be used.
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4. KVM_HC_PPC_MAP_MAGIC_PAGE
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------------------------
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Architecture: PPC
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Status: active
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Purpose: To enable communication between the hypervisor and guest there is a
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shared page that contains parts of supervisor visible register state.
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The guest can map this shared page to access its supervisor register through
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memory using this hypercall.
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5. KVM_HC_KICK_CPU
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------------------------
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Architecture: x86
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Status: active
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Purpose: Hypercall used to wakeup a vcpu from HLT state
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Usage example : A vcpu of a paravirtualized guest that is busywaiting in guest
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kernel mode for an event to occur (ex: a spinlock to become available) can
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execute HLT instruction once it has busy-waited for more than a threshold
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time-interval. Execution of HLT instruction would cause the hypervisor to put
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the vcpu to sleep until occurrence of an appropriate event. Another vcpu of the
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same guest can wakeup the sleeping vcpu by issuing KVM_HC_KICK_CPU hypercall,
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specifying APIC ID (a1) of the vcpu to be woken up. An additional argument (a0)
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is used in the hypercall for future use.
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6. KVM_HC_CLOCK_PAIRING
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------------------------
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Architecture: x86
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Status: active
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Purpose: Hypercall used to synchronize host and guest clocks.
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Usage:
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a0: guest physical address where host copies
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"struct kvm_clock_offset" structure.
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a1: clock_type, ATM only KVM_CLOCK_PAIRING_WALLCLOCK (0)
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is supported (corresponding to the host's CLOCK_REALTIME clock).
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struct kvm_clock_pairing {
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__s64 sec;
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__s64 nsec;
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__u64 tsc;
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__u32 flags;
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__u32 pad[9];
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};
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Where:
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* sec: seconds from clock_type clock.
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* nsec: nanoseconds from clock_type clock.
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* tsc: guest TSC value used to calculate sec/nsec pair
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* flags: flags, unused (0) at the moment.
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The hypercall lets a guest compute a precise timestamp across
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host and guest. The guest can use the returned TSC value to
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compute the CLOCK_REALTIME for its clock, at the same instant.
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Returns KVM_EOPNOTSUPP if the host does not use TSC clocksource,
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or if clock type is different than KVM_CLOCK_PAIRING_WALLCLOCK.
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6. KVM_HC_SEND_IPI
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------------------------
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Architecture: x86
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Status: active
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Purpose: Send IPIs to multiple vCPUs.
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a0: lower part of the bitmap of destination APIC IDs
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a1: higher part of the bitmap of destination APIC IDs
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a2: the lowest APIC ID in bitmap
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a3: APIC ICR
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The hypercall lets a guest send multicast IPIs, with at most 128
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128 destinations per hypercall in 64-bit mode and 64 vCPUs per
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hypercall in 32-bit mode. The destinations are represented by a
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bitmap contained in the first two arguments (a0 and a1). Bit 0 of
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a0 corresponds to the APIC ID in the third argument (a2), bit 1
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corresponds to the APIC ID a2+1, and so on.
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Returns the number of CPUs to which the IPIs were delivered successfully.
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