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34f1bdee19
The pci_iomap variant that arch/mn10300/unit-asb2305/pci-iomap.c uses differs from the generic one in that it does not use ioremap_nocache for PCI addresses. However, it turns out that PCI addresses are automatically noncached, so switching to ioremap_nocache and to the generic implementation is safe. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
314 lines
7.2 KiB
C
314 lines
7.2 KiB
C
/* MN10300 I/O port emulation and memory-mapped I/O
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#ifndef _ASM_IO_H
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#define _ASM_IO_H
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#include <asm/page.h> /* I/O is all done through memory accesses */
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#include <asm/cpu-regs.h>
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#include <asm/cacheflush.h>
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#define mmiowb() do {} while (0)
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/*****************************************************************************/
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/*
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* readX/writeX() are used to access memory mapped devices. On some
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* architectures the memory mapped IO stuff needs to be accessed
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* differently. On the x86 architecture, we just read/write the
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* memory location directly.
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*/
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static inline u8 readb(const volatile void __iomem *addr)
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{
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return *(const volatile u8 *) addr;
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}
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static inline u16 readw(const volatile void __iomem *addr)
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{
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return *(const volatile u16 *) addr;
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}
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static inline u32 readl(const volatile void __iomem *addr)
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{
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return *(const volatile u32 *) addr;
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}
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#define __raw_readb readb
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#define __raw_readw readw
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#define __raw_readl readl
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#define readb_relaxed readb
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#define readw_relaxed readw
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#define readl_relaxed readl
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static inline void writeb(u8 b, volatile void __iomem *addr)
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{
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*(volatile u8 *) addr = b;
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}
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static inline void writew(u16 b, volatile void __iomem *addr)
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{
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*(volatile u16 *) addr = b;
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}
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static inline void writel(u32 b, volatile void __iomem *addr)
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{
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*(volatile u32 *) addr = b;
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}
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#define __raw_writeb writeb
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#define __raw_writew writew
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#define __raw_writel writel
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/*****************************************************************************/
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/*
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* traditional input/output functions
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*/
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static inline u8 inb_local(unsigned long addr)
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{
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return readb((volatile void __iomem *) addr);
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}
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static inline void outb_local(u8 b, unsigned long addr)
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{
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return writeb(b, (volatile void __iomem *) addr);
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}
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static inline u8 inb(unsigned long addr)
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{
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return readb((volatile void __iomem *) addr);
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}
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static inline u16 inw(unsigned long addr)
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{
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return readw((volatile void __iomem *) addr);
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}
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static inline u32 inl(unsigned long addr)
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{
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return readl((volatile void __iomem *) addr);
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}
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static inline void outb(u8 b, unsigned long addr)
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{
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return writeb(b, (volatile void __iomem *) addr);
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}
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static inline void outw(u16 b, unsigned long addr)
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{
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return writew(b, (volatile void __iomem *) addr);
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}
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static inline void outl(u32 b, unsigned long addr)
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{
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return writel(b, (volatile void __iomem *) addr);
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}
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#define inb_p(addr) inb(addr)
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#define inw_p(addr) inw(addr)
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#define inl_p(addr) inl(addr)
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#define outb_p(x, addr) outb((x), (addr))
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#define outw_p(x, addr) outw((x), (addr))
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#define outl_p(x, addr) outl((x), (addr))
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static inline void insb(unsigned long addr, void *buffer, int count)
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{
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if (count) {
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u8 *buf = buffer;
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do {
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u8 x = inb(addr);
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*buf++ = x;
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} while (--count);
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}
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}
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static inline void insw(unsigned long addr, void *buffer, int count)
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{
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if (count) {
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u16 *buf = buffer;
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do {
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u16 x = inw(addr);
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*buf++ = x;
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} while (--count);
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}
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}
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static inline void insl(unsigned long addr, void *buffer, int count)
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{
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if (count) {
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u32 *buf = buffer;
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do {
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u32 x = inl(addr);
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*buf++ = x;
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} while (--count);
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}
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}
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static inline void outsb(unsigned long addr, const void *buffer, int count)
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{
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if (count) {
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const u8 *buf = buffer;
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do {
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outb(*buf++, addr);
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} while (--count);
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}
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}
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static inline void outsw(unsigned long addr, const void *buffer, int count)
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{
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if (count) {
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const u16 *buf = buffer;
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do {
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outw(*buf++, addr);
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} while (--count);
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}
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}
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extern void __outsl(unsigned long addr, const void *buffer, int count);
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static inline void outsl(unsigned long addr, const void *buffer, int count)
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{
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if ((unsigned long) buffer & 0x3)
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return __outsl(addr, buffer, count);
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if (count) {
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const u32 *buf = buffer;
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do {
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outl(*buf++, addr);
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} while (--count);
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}
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}
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#define ioread8(addr) readb(addr)
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#define ioread16(addr) readw(addr)
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#define ioread32(addr) readl(addr)
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#define iowrite8(v, addr) writeb((v), (addr))
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#define iowrite16(v, addr) writew((v), (addr))
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#define iowrite32(v, addr) writel((v), (addr))
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#define ioread8_rep(p, dst, count) \
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insb((unsigned long) (p), (dst), (count))
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#define ioread16_rep(p, dst, count) \
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insw((unsigned long) (p), (dst), (count))
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#define ioread32_rep(p, dst, count) \
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insl((unsigned long) (p), (dst), (count))
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#define iowrite8_rep(p, src, count) \
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outsb((unsigned long) (p), (src), (count))
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#define iowrite16_rep(p, src, count) \
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outsw((unsigned long) (p), (src), (count))
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#define iowrite32_rep(p, src, count) \
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outsl((unsigned long) (p), (src), (count))
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#define readsb(p, dst, count) \
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insb((unsigned long) (p), (dst), (count))
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#define readsw(p, dst, count) \
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insw((unsigned long) (p), (dst), (count))
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#define readsl(p, dst, count) \
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insl((unsigned long) (p), (dst), (count))
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#define writesb(p, src, count) \
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outsb((unsigned long) (p), (src), (count))
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#define writesw(p, src, count) \
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outsw((unsigned long) (p), (src), (count))
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#define writesl(p, src, count) \
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outsl((unsigned long) (p), (src), (count))
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#define IO_SPACE_LIMIT 0xffffffff
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#ifdef __KERNEL__
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#include <linux/vmalloc.h>
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#define __io_virt(x) ((void *) (x))
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/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
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struct pci_dev;
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static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
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{
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}
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/*
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* Change virtual addresses to physical addresses and vv.
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* These are pretty trivial
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*/
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static inline unsigned long virt_to_phys(volatile void *address)
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{
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return __pa(address);
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}
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static inline void *phys_to_virt(unsigned long address)
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{
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return __va(address);
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}
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/*
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* Change "struct page" to physical address.
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*/
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static inline void __iomem *__ioremap(unsigned long offset, unsigned long size,
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unsigned long flags)
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{
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return (void __iomem *) offset;
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}
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static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
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{
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return (void __iomem *) offset;
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}
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/*
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* This one maps high address device memory and turns off caching for that
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* area. it's useful if some control registers are in such an area and write
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* combining or read caching is not desirable:
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*/
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static inline void __iomem *ioremap_nocache(unsigned long offset, unsigned long size)
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{
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return (void __iomem *) (offset | 0x20000000);
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}
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#define ioremap_wc ioremap_nocache
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static inline void iounmap(void __iomem *addr)
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{
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}
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static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
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{
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return (void __iomem *) port;
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}
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static inline void ioport_unmap(void __iomem *p)
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{
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}
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#define xlate_dev_kmem_ptr(p) ((void *) (p))
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#define xlate_dev_mem_ptr(p) ((void *) (p))
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/*
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* PCI bus iomem addresses must be in the region 0x80000000-0x9fffffff
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*/
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static inline unsigned long virt_to_bus(volatile void *address)
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{
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return ((unsigned long) address) & ~0x20000000;
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}
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static inline void *bus_to_virt(unsigned long address)
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{
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return (void *) address;
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}
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#define page_to_bus page_to_phys
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#define memset_io(a, b, c) memset(__io_virt(a), (b), (c))
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#define memcpy_fromio(a, b, c) memcpy((a), __io_virt(b), (c))
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#define memcpy_toio(a, b, c) memcpy(__io_virt(a), (b), (c))
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#endif /* __KERNEL__ */
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#endif /* _ASM_IO_H */
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