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mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-18 02:04:05 +08:00
linux-next/drivers/cxl
Fan Ni f04facfb99 cxl/region: Fix memdev reuse check
Due to a typo, the check of whether or not a memdev has already been
used as a target for the region (above code piece) will always be
skipped. Given a memdev with more than one HDM decoder, an interleaved
region can be created that maps multiple HPAs to the same DPA. According
to CXL spec 3.0 8.1.3.8.4, "Aliasing (mapping more than one Host
Physical Address (HPA) to a single Device Physical Address) is
forbidden."

Fix this by using existing iterator for memdev reuse check.

Cc: <stable@vger.kernel.org>
Fixes: 384e624bb2 ("cxl/region: Attach endpoint decoders")
Signed-off-by: Fan Ni <fan.ni@samsung.com>
Link: https://lore.kernel.org/r/20221107212153.745993-1-fan.ni@samsung.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2022-12-08 13:03:47 -08:00
..
core cxl/region: Fix memdev reuse check 2022-12-08 13:03:47 -08:00
acpi.c cxl: update names for interleave ways conversion macros 2022-12-05 18:17:16 -08:00
cxl.h cxl: update names for interleave ways conversion macros 2022-12-05 18:17:16 -08:00
cxlmem.h cxl/mbox: Add variable output size validation for internal commands 2022-12-06 14:36:02 -08:00
cxlpci.h cxl/core/regs: Make cxl_map_{component, device}_regs() device generic 2022-12-03 13:40:16 -08:00
Kconfig cxl/region: Manage CPU caches relative to DPA invalidation events 2022-12-03 00:03:57 -08:00
Makefile cxl/pmem: Introduce nvdimm_security_ops with ->get_flags() operation 2022-11-30 16:30:47 -08:00
mem.c cxl/port: Add RCD endpoint port enumeration 2022-12-05 10:32:26 -08:00
pci.c cxl/pci: Remove endian confusion 2022-12-06 14:38:12 -08:00
pmem.c cxl/mbox: Enable cxl_mbox_send_cmd() users to validate output size 2022-12-06 14:36:02 -08:00
port.c cxl/port: Read CDAT table 2022-07-19 15:38:05 -07:00
security.c cxl/mbox: Enable cxl_mbox_send_cmd() users to validate output size 2022-12-06 14:36:02 -08:00