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60b3c7ed71
This patch adds support to STiH410 SoC. Please note "st,stih410" is already present in device tree. The problem is that it is missing the entry in the match table, and so the L2 cache and other cpus than 0 don't get initialized. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Tested-by: Maxime Coquelin <maxime.coquelin@st.com> Acked-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
35 lines
913 B
C
35 lines
913 B
C
/*
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* Copyright (C) 2013 STMicroelectronics (R&D) Limited.
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* Author(s): Srinivas Kandagatla <srinivas.kandagatla@st.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/irq.h>
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#include <linux/of_platform.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/mach/arch.h>
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#include "smp.h"
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static const char *stih41x_dt_match[] __initdata = {
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"st,stih415",
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"st,stih416",
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"st,stih407",
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"st,stih410",
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"st,stih418",
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NULL
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};
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DT_MACHINE_START(STM, "STiH415/416 SoC with Flattened Device Tree")
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.dt_compat = stih41x_dt_match,
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.l2c_aux_val = L2C_AUX_CTRL_SHARED_OVERRIDE |
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L310_AUX_CTRL_DATA_PREFETCH |
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L310_AUX_CTRL_INSTR_PREFETCH |
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L2C_AUX_CTRL_WAY_SIZE(4),
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.l2c_aux_mask = 0xc0000fff,
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.smp = smp_ops(sti_smp_ops),
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MACHINE_END
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