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3824abd127
A simple implementation that only supports the word size and does not have a fallback mode (would require a spinlock). Add 32 and 64 bit support for cmpxchg_double. cmpxchg double uses the cmpxchg8b or cmpxchg16b instruction on x86 processors to compare and swap 2 machine words. This allows lockless algorithms to move more context information through critical sections. Set a flag CONFIG_CMPXCHG_DOUBLE to signal that support for double word cmpxchg detection has been build into the kernel. Note that each subsystem using cmpxchg_double has to implement a fall back mechanism as long as we offer support for processors that do not implement cmpxchg_double. Reviewed-by: H. Peter Anvin <hpa@zytor.com> Cc: Tejun Heo <tj@kernel.org> Cc: Pekka Enberg <penberg@cs.helsinki.fi> Signed-off-by: Christoph Lameter <cl@linux.com> Link: http://lkml.kernel.org/r/20110601172614.173427964@linux.com Signed-off-by: H. Peter Anvin <hpa@zytor.com>
200 lines
5.3 KiB
C
200 lines
5.3 KiB
C
#ifndef _ASM_X86_CMPXCHG_64_H
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#define _ASM_X86_CMPXCHG_64_H
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#include <asm/alternative.h> /* Provides LOCK_PREFIX */
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static inline void set_64bit(volatile u64 *ptr, u64 val)
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{
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*ptr = val;
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}
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extern void __xchg_wrong_size(void);
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extern void __cmpxchg_wrong_size(void);
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/*
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* Note: no "lock" prefix even on SMP: xchg always implies lock anyway.
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* Since this is generally used to protect other memory information, we
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* use "asm volatile" and "memory" clobbers to prevent gcc from moving
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* information around.
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*/
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#define __xchg(x, ptr, size) \
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({ \
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__typeof(*(ptr)) __x = (x); \
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switch (size) { \
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case 1: \
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{ \
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volatile u8 *__ptr = (volatile u8 *)(ptr); \
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asm volatile("xchgb %0,%1" \
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: "=q" (__x), "+m" (*__ptr) \
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: "0" (__x) \
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: "memory"); \
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break; \
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} \
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case 2: \
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{ \
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volatile u16 *__ptr = (volatile u16 *)(ptr); \
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asm volatile("xchgw %0,%1" \
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: "=r" (__x), "+m" (*__ptr) \
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: "0" (__x) \
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: "memory"); \
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break; \
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} \
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case 4: \
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{ \
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volatile u32 *__ptr = (volatile u32 *)(ptr); \
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asm volatile("xchgl %0,%1" \
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: "=r" (__x), "+m" (*__ptr) \
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: "0" (__x) \
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: "memory"); \
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break; \
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} \
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case 8: \
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{ \
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volatile u64 *__ptr = (volatile u64 *)(ptr); \
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asm volatile("xchgq %0,%1" \
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: "=r" (__x), "+m" (*__ptr) \
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: "0" (__x) \
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: "memory"); \
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break; \
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} \
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default: \
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__xchg_wrong_size(); \
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} \
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__x; \
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})
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#define xchg(ptr, v) \
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__xchg((v), (ptr), sizeof(*ptr))
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#define __HAVE_ARCH_CMPXCHG 1
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/*
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* Atomic compare and exchange. Compare OLD with MEM, if identical,
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* store NEW in MEM. Return the initial value in MEM. Success is
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* indicated by comparing RETURN with OLD.
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*/
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#define __raw_cmpxchg(ptr, old, new, size, lock) \
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({ \
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__typeof__(*(ptr)) __ret; \
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__typeof__(*(ptr)) __old = (old); \
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__typeof__(*(ptr)) __new = (new); \
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switch (size) { \
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case 1: \
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{ \
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volatile u8 *__ptr = (volatile u8 *)(ptr); \
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asm volatile(lock "cmpxchgb %2,%1" \
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: "=a" (__ret), "+m" (*__ptr) \
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: "q" (__new), "0" (__old) \
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: "memory"); \
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break; \
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} \
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case 2: \
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{ \
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volatile u16 *__ptr = (volatile u16 *)(ptr); \
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asm volatile(lock "cmpxchgw %2,%1" \
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: "=a" (__ret), "+m" (*__ptr) \
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: "r" (__new), "0" (__old) \
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: "memory"); \
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break; \
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} \
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case 4: \
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{ \
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volatile u32 *__ptr = (volatile u32 *)(ptr); \
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asm volatile(lock "cmpxchgl %2,%1" \
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: "=a" (__ret), "+m" (*__ptr) \
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: "r" (__new), "0" (__old) \
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: "memory"); \
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break; \
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} \
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case 8: \
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{ \
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volatile u64 *__ptr = (volatile u64 *)(ptr); \
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asm volatile(lock "cmpxchgq %2,%1" \
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: "=a" (__ret), "+m" (*__ptr) \
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: "r" (__new), "0" (__old) \
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: "memory"); \
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break; \
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} \
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default: \
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__cmpxchg_wrong_size(); \
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} \
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__ret; \
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})
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#define __cmpxchg(ptr, old, new, size) \
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__raw_cmpxchg((ptr), (old), (new), (size), LOCK_PREFIX)
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#define __sync_cmpxchg(ptr, old, new, size) \
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__raw_cmpxchg((ptr), (old), (new), (size), "lock; ")
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#define __cmpxchg_local(ptr, old, new, size) \
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__raw_cmpxchg((ptr), (old), (new), (size), "")
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#define cmpxchg(ptr, old, new) \
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__cmpxchg((ptr), (old), (new), sizeof(*ptr))
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#define sync_cmpxchg(ptr, old, new) \
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__sync_cmpxchg((ptr), (old), (new), sizeof(*ptr))
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#define cmpxchg_local(ptr, old, new) \
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__cmpxchg_local((ptr), (old), (new), sizeof(*ptr))
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#define cmpxchg64(ptr, o, n) \
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({ \
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BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
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cmpxchg((ptr), (o), (n)); \
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})
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#define cmpxchg64_local(ptr, o, n) \
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({ \
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BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
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cmpxchg_local((ptr), (o), (n)); \
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})
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#define cmpxchg16b(ptr, o1, o2, n1, n2) \
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({ \
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char __ret; \
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__typeof__(o2) __junk; \
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__typeof__(*(ptr)) __old1 = (o1); \
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__typeof__(o2) __old2 = (o2); \
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__typeof__(*(ptr)) __new1 = (n1); \
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__typeof__(o2) __new2 = (n2); \
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asm volatile(LOCK_PREFIX "cmpxchg16b %2;setz %1" \
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: "=d"(__junk), "=a"(__ret), "+m" (*ptr) \
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: "b"(__new1), "c"(__new2), \
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"a"(__old1), "d"(__old2)); \
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__ret; })
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#define cmpxchg16b_local(ptr, o1, o2, n1, n2) \
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({ \
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char __ret; \
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__typeof__(o2) __junk; \
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__typeof__(*(ptr)) __old1 = (o1); \
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__typeof__(o2) __old2 = (o2); \
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__typeof__(*(ptr)) __new1 = (n1); \
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__typeof__(o2) __new2 = (n2); \
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asm volatile("cmpxchg16b %2;setz %1" \
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: "=d"(__junk), "=a"(__ret), "+m" (*ptr) \
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: "b"(__new1), "c"(__new2), \
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"a"(__old1), "d"(__old2)); \
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__ret; })
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#define cmpxchg_double(ptr, o1, o2, n1, n2) \
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({ \
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BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
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VM_BUG_ON((unsigned long)(ptr) % 16); \
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cmpxchg16b((ptr), (o1), (o2), (n1), (n2)); \
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})
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#define cmpxchg_double_local(ptr, o1, o2, n1, n2) \
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({ \
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BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
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VM_BUG_ON((unsigned long)(ptr) % 16); \
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cmpxchg16b_local((ptr), (o1), (o2), (n1), (n2)); \
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})
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#define system_has_cmpxchg_double() cpu_has_cx16
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#endif /* _ASM_X86_CMPXCHG_64_H */
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