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285f5fa7e9
The iop348 processor integrates an Xscale (XSC3 512KB L2 Cache) core with a Serial Attached SCSI (SAS) controller, multi-ported DDR2 memory controller, 3 Application Direct Memory Access (DMA) controllers, a 133Mhz PCI-X interface, a x8 PCI-Express interface, and other peripherals to form a system-on-a-chip RAID subsystem engine. The iop342 processor replaces the SAS controller with a second Xscale core for dual core embedded applications. The iop341 processor is the single core version of iop342. This patch supports the two Intel customer reference platforms iq81340mc for external storage and iq81340sc for direct attach (HBA) development. The developer's manual is available here: ftp://download.intel.com/design/iio/docs/31503701.pdf Changelog: * removed virtual addresses from resource definitions * cleaned up some unnecessary #include's Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
21 lines
422 B
Plaintext
21 lines
422 B
Plaintext
if ARCH_IOP13XX
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menu "IOP13XX Implementation Options"
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comment "IOP13XX Platform Support"
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config MACH_IQ81340SC
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bool "Enable IQ81340SC Hardware Support"
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help
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Say Y here if you want to support running on the Intel IQ81340SC
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evaluation kit.
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config MACH_IQ81340MC
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bool "Enable IQ81340MC Hardware Support"
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help
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Say Y here if you want to support running on the Intel IQ81340MC
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evaluation kit.
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endmenu
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endif
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