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d91cab7813
There are two concepts that have some confusing naming: 1. Extended State Component numbers (currently called XFEATURE_BIT_*) 2. Extended State Component masks (currently called XSTATE_*) The numbers are (currently) from 0-9. State component 3 is the bounds registers for MPX, for instance. But when we want to enable "state component 3", we go set a bit in XCR0. The bit we set is 1<<3. We can check to see if a state component feature is enabled by looking at its bit. The current 'xfeature_bit's are at best xfeature bit _numbers_. Calling them bits is at best inconsistent with ending the enum list with 'XFEATURES_NR_MAX'. This patch renames the enum to be 'xfeature'. These also happen to be what the Intel documentation calls a "state component". We also want to differentiate these from the "XSTATE_*" macros. The "XSTATE_*" macros are a mask, and we rename them to match. These macros are reasonably widely used so this patch is a wee bit big, but this really is just a rename. The only non-mechanical part of this is the s/XSTATE_EXTEND_MASK/XFEATURE_MASK_EXTEND/ We need a better name for it, but that's another patch. Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tim Chen <tim.c.chen@linux.intel.com> Cc: dave@sr71.net Cc: linux-kernel@vger.kernel.org Link: http://lkml.kernel.org/r/20150902233126.38653250@viggo.jf.intel.com [ Ported to v4.3-rc1. ] Signed-off-by: Ingo Molnar <mingo@kernel.org>
591 lines
17 KiB
C
591 lines
17 KiB
C
/*
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* Glue Code for x86_64/AVX2/AES-NI assembler optimized version of Camellia
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*
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* Copyright © 2013 Jussi Kivilinna <jussi.kivilinna@mbnet.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/crypto.h>
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#include <linux/err.h>
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#include <crypto/ablk_helper.h>
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#include <crypto/algapi.h>
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#include <crypto/ctr.h>
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#include <crypto/lrw.h>
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#include <crypto/xts.h>
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#include <asm/fpu/api.h>
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#include <asm/crypto/camellia.h>
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#include <asm/crypto/glue_helper.h>
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#define CAMELLIA_AESNI_PARALLEL_BLOCKS 16
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#define CAMELLIA_AESNI_AVX2_PARALLEL_BLOCKS 32
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/* 32-way AVX2/AES-NI parallel cipher functions */
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asmlinkage void camellia_ecb_enc_32way(struct camellia_ctx *ctx, u8 *dst,
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const u8 *src);
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asmlinkage void camellia_ecb_dec_32way(struct camellia_ctx *ctx, u8 *dst,
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const u8 *src);
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asmlinkage void camellia_cbc_dec_32way(struct camellia_ctx *ctx, u8 *dst,
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const u8 *src);
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asmlinkage void camellia_ctr_32way(struct camellia_ctx *ctx, u8 *dst,
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const u8 *src, le128 *iv);
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asmlinkage void camellia_xts_enc_32way(struct camellia_ctx *ctx, u8 *dst,
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const u8 *src, le128 *iv);
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asmlinkage void camellia_xts_dec_32way(struct camellia_ctx *ctx, u8 *dst,
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const u8 *src, le128 *iv);
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static const struct common_glue_ctx camellia_enc = {
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.num_funcs = 4,
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.fpu_blocks_limit = CAMELLIA_AESNI_PARALLEL_BLOCKS,
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.funcs = { {
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.num_blocks = CAMELLIA_AESNI_AVX2_PARALLEL_BLOCKS,
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.fn_u = { .ecb = GLUE_FUNC_CAST(camellia_ecb_enc_32way) }
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}, {
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.num_blocks = CAMELLIA_AESNI_PARALLEL_BLOCKS,
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.fn_u = { .ecb = GLUE_FUNC_CAST(camellia_ecb_enc_16way) }
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}, {
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.num_blocks = 2,
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.fn_u = { .ecb = GLUE_FUNC_CAST(camellia_enc_blk_2way) }
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}, {
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.num_blocks = 1,
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.fn_u = { .ecb = GLUE_FUNC_CAST(camellia_enc_blk) }
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} }
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};
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static const struct common_glue_ctx camellia_ctr = {
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.num_funcs = 4,
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.fpu_blocks_limit = CAMELLIA_AESNI_PARALLEL_BLOCKS,
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.funcs = { {
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.num_blocks = CAMELLIA_AESNI_AVX2_PARALLEL_BLOCKS,
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.fn_u = { .ctr = GLUE_CTR_FUNC_CAST(camellia_ctr_32way) }
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}, {
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.num_blocks = CAMELLIA_AESNI_PARALLEL_BLOCKS,
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.fn_u = { .ctr = GLUE_CTR_FUNC_CAST(camellia_ctr_16way) }
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}, {
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.num_blocks = 2,
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.fn_u = { .ctr = GLUE_CTR_FUNC_CAST(camellia_crypt_ctr_2way) }
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}, {
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.num_blocks = 1,
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.fn_u = { .ctr = GLUE_CTR_FUNC_CAST(camellia_crypt_ctr) }
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} }
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};
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static const struct common_glue_ctx camellia_enc_xts = {
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.num_funcs = 3,
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.fpu_blocks_limit = CAMELLIA_AESNI_PARALLEL_BLOCKS,
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.funcs = { {
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.num_blocks = CAMELLIA_AESNI_AVX2_PARALLEL_BLOCKS,
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.fn_u = { .xts = GLUE_XTS_FUNC_CAST(camellia_xts_enc_32way) }
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}, {
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.num_blocks = CAMELLIA_AESNI_PARALLEL_BLOCKS,
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.fn_u = { .xts = GLUE_XTS_FUNC_CAST(camellia_xts_enc_16way) }
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}, {
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.num_blocks = 1,
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.fn_u = { .xts = GLUE_XTS_FUNC_CAST(camellia_xts_enc) }
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} }
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};
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static const struct common_glue_ctx camellia_dec = {
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.num_funcs = 4,
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.fpu_blocks_limit = CAMELLIA_AESNI_PARALLEL_BLOCKS,
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.funcs = { {
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.num_blocks = CAMELLIA_AESNI_AVX2_PARALLEL_BLOCKS,
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.fn_u = { .ecb = GLUE_FUNC_CAST(camellia_ecb_dec_32way) }
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}, {
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.num_blocks = CAMELLIA_AESNI_PARALLEL_BLOCKS,
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.fn_u = { .ecb = GLUE_FUNC_CAST(camellia_ecb_dec_16way) }
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}, {
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.num_blocks = 2,
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.fn_u = { .ecb = GLUE_FUNC_CAST(camellia_dec_blk_2way) }
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}, {
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.num_blocks = 1,
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.fn_u = { .ecb = GLUE_FUNC_CAST(camellia_dec_blk) }
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} }
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};
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static const struct common_glue_ctx camellia_dec_cbc = {
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.num_funcs = 4,
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.fpu_blocks_limit = CAMELLIA_AESNI_PARALLEL_BLOCKS,
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.funcs = { {
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.num_blocks = CAMELLIA_AESNI_AVX2_PARALLEL_BLOCKS,
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.fn_u = { .cbc = GLUE_CBC_FUNC_CAST(camellia_cbc_dec_32way) }
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}, {
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.num_blocks = CAMELLIA_AESNI_PARALLEL_BLOCKS,
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.fn_u = { .cbc = GLUE_CBC_FUNC_CAST(camellia_cbc_dec_16way) }
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}, {
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.num_blocks = 2,
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.fn_u = { .cbc = GLUE_CBC_FUNC_CAST(camellia_decrypt_cbc_2way) }
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}, {
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.num_blocks = 1,
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.fn_u = { .cbc = GLUE_CBC_FUNC_CAST(camellia_dec_blk) }
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} }
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};
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static const struct common_glue_ctx camellia_dec_xts = {
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.num_funcs = 3,
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.fpu_blocks_limit = CAMELLIA_AESNI_PARALLEL_BLOCKS,
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.funcs = { {
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.num_blocks = CAMELLIA_AESNI_AVX2_PARALLEL_BLOCKS,
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.fn_u = { .xts = GLUE_XTS_FUNC_CAST(camellia_xts_dec_32way) }
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}, {
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.num_blocks = CAMELLIA_AESNI_PARALLEL_BLOCKS,
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.fn_u = { .xts = GLUE_XTS_FUNC_CAST(camellia_xts_dec_16way) }
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}, {
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.num_blocks = 1,
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.fn_u = { .xts = GLUE_XTS_FUNC_CAST(camellia_xts_dec) }
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} }
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};
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static int ecb_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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return glue_ecb_crypt_128bit(&camellia_enc, desc, dst, src, nbytes);
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}
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static int ecb_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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return glue_ecb_crypt_128bit(&camellia_dec, desc, dst, src, nbytes);
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}
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static int cbc_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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return glue_cbc_encrypt_128bit(GLUE_FUNC_CAST(camellia_enc_blk), desc,
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dst, src, nbytes);
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}
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static int cbc_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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return glue_cbc_decrypt_128bit(&camellia_dec_cbc, desc, dst, src,
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nbytes);
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}
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static int ctr_crypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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return glue_ctr_crypt_128bit(&camellia_ctr, desc, dst, src, nbytes);
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}
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static inline bool camellia_fpu_begin(bool fpu_enabled, unsigned int nbytes)
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{
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return glue_fpu_begin(CAMELLIA_BLOCK_SIZE,
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CAMELLIA_AESNI_PARALLEL_BLOCKS, NULL, fpu_enabled,
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nbytes);
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}
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static inline void camellia_fpu_end(bool fpu_enabled)
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{
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glue_fpu_end(fpu_enabled);
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}
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static int camellia_setkey(struct crypto_tfm *tfm, const u8 *in_key,
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unsigned int key_len)
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{
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return __camellia_setkey(crypto_tfm_ctx(tfm), in_key, key_len,
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&tfm->crt_flags);
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}
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struct crypt_priv {
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struct camellia_ctx *ctx;
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bool fpu_enabled;
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};
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static void encrypt_callback(void *priv, u8 *srcdst, unsigned int nbytes)
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{
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const unsigned int bsize = CAMELLIA_BLOCK_SIZE;
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struct crypt_priv *ctx = priv;
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int i;
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ctx->fpu_enabled = camellia_fpu_begin(ctx->fpu_enabled, nbytes);
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if (nbytes >= CAMELLIA_AESNI_AVX2_PARALLEL_BLOCKS * bsize) {
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camellia_ecb_enc_32way(ctx->ctx, srcdst, srcdst);
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srcdst += bsize * CAMELLIA_AESNI_AVX2_PARALLEL_BLOCKS;
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nbytes -= bsize * CAMELLIA_AESNI_AVX2_PARALLEL_BLOCKS;
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}
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if (nbytes >= CAMELLIA_AESNI_PARALLEL_BLOCKS * bsize) {
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camellia_ecb_enc_16way(ctx->ctx, srcdst, srcdst);
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srcdst += bsize * CAMELLIA_AESNI_PARALLEL_BLOCKS;
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nbytes -= bsize * CAMELLIA_AESNI_PARALLEL_BLOCKS;
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}
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while (nbytes >= CAMELLIA_PARALLEL_BLOCKS * bsize) {
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camellia_enc_blk_2way(ctx->ctx, srcdst, srcdst);
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srcdst += bsize * CAMELLIA_PARALLEL_BLOCKS;
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nbytes -= bsize * CAMELLIA_PARALLEL_BLOCKS;
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}
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for (i = 0; i < nbytes / bsize; i++, srcdst += bsize)
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camellia_enc_blk(ctx->ctx, srcdst, srcdst);
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}
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static void decrypt_callback(void *priv, u8 *srcdst, unsigned int nbytes)
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{
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const unsigned int bsize = CAMELLIA_BLOCK_SIZE;
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struct crypt_priv *ctx = priv;
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int i;
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ctx->fpu_enabled = camellia_fpu_begin(ctx->fpu_enabled, nbytes);
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if (nbytes >= CAMELLIA_AESNI_AVX2_PARALLEL_BLOCKS * bsize) {
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camellia_ecb_dec_32way(ctx->ctx, srcdst, srcdst);
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srcdst += bsize * CAMELLIA_AESNI_AVX2_PARALLEL_BLOCKS;
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nbytes -= bsize * CAMELLIA_AESNI_AVX2_PARALLEL_BLOCKS;
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}
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if (nbytes >= CAMELLIA_AESNI_PARALLEL_BLOCKS * bsize) {
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camellia_ecb_dec_16way(ctx->ctx, srcdst, srcdst);
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srcdst += bsize * CAMELLIA_AESNI_PARALLEL_BLOCKS;
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nbytes -= bsize * CAMELLIA_AESNI_PARALLEL_BLOCKS;
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}
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while (nbytes >= CAMELLIA_PARALLEL_BLOCKS * bsize) {
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camellia_dec_blk_2way(ctx->ctx, srcdst, srcdst);
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srcdst += bsize * CAMELLIA_PARALLEL_BLOCKS;
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nbytes -= bsize * CAMELLIA_PARALLEL_BLOCKS;
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}
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for (i = 0; i < nbytes / bsize; i++, srcdst += bsize)
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camellia_dec_blk(ctx->ctx, srcdst, srcdst);
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}
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static int lrw_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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struct camellia_lrw_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
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be128 buf[CAMELLIA_AESNI_AVX2_PARALLEL_BLOCKS];
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struct crypt_priv crypt_ctx = {
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.ctx = &ctx->camellia_ctx,
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.fpu_enabled = false,
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};
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struct lrw_crypt_req req = {
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.tbuf = buf,
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.tbuflen = sizeof(buf),
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.table_ctx = &ctx->lrw_table,
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.crypt_ctx = &crypt_ctx,
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.crypt_fn = encrypt_callback,
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};
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int ret;
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desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
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ret = lrw_crypt(desc, dst, src, nbytes, &req);
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camellia_fpu_end(crypt_ctx.fpu_enabled);
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return ret;
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}
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static int lrw_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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struct camellia_lrw_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
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be128 buf[CAMELLIA_AESNI_AVX2_PARALLEL_BLOCKS];
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struct crypt_priv crypt_ctx = {
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.ctx = &ctx->camellia_ctx,
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.fpu_enabled = false,
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};
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struct lrw_crypt_req req = {
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.tbuf = buf,
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.tbuflen = sizeof(buf),
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.table_ctx = &ctx->lrw_table,
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.crypt_ctx = &crypt_ctx,
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.crypt_fn = decrypt_callback,
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};
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int ret;
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desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
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ret = lrw_crypt(desc, dst, src, nbytes, &req);
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camellia_fpu_end(crypt_ctx.fpu_enabled);
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return ret;
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}
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static int xts_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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struct camellia_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
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return glue_xts_crypt_128bit(&camellia_enc_xts, desc, dst, src, nbytes,
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XTS_TWEAK_CAST(camellia_enc_blk),
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&ctx->tweak_ctx, &ctx->crypt_ctx);
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}
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static int xts_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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struct camellia_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
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return glue_xts_crypt_128bit(&camellia_dec_xts, desc, dst, src, nbytes,
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XTS_TWEAK_CAST(camellia_enc_blk),
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&ctx->tweak_ctx, &ctx->crypt_ctx);
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}
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static struct crypto_alg cmll_algs[10] = { {
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.cra_name = "__ecb-camellia-aesni-avx2",
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.cra_driver_name = "__driver-ecb-camellia-aesni-avx2",
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.cra_priority = 0,
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.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER |
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CRYPTO_ALG_INTERNAL,
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.cra_blocksize = CAMELLIA_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct camellia_ctx),
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.cra_alignmask = 0,
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.cra_type = &crypto_blkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_u = {
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.blkcipher = {
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.min_keysize = CAMELLIA_MIN_KEY_SIZE,
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.max_keysize = CAMELLIA_MAX_KEY_SIZE,
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.setkey = camellia_setkey,
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.encrypt = ecb_encrypt,
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.decrypt = ecb_decrypt,
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},
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},
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}, {
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.cra_name = "__cbc-camellia-aesni-avx2",
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.cra_driver_name = "__driver-cbc-camellia-aesni-avx2",
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.cra_priority = 0,
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.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER |
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CRYPTO_ALG_INTERNAL,
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.cra_blocksize = CAMELLIA_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct camellia_ctx),
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.cra_alignmask = 0,
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.cra_type = &crypto_blkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_u = {
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.blkcipher = {
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.min_keysize = CAMELLIA_MIN_KEY_SIZE,
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.max_keysize = CAMELLIA_MAX_KEY_SIZE,
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.setkey = camellia_setkey,
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.encrypt = cbc_encrypt,
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.decrypt = cbc_decrypt,
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},
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},
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}, {
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.cra_name = "__ctr-camellia-aesni-avx2",
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.cra_driver_name = "__driver-ctr-camellia-aesni-avx2",
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.cra_priority = 0,
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.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER |
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CRYPTO_ALG_INTERNAL,
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.cra_blocksize = 1,
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.cra_ctxsize = sizeof(struct camellia_ctx),
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|
.cra_alignmask = 0,
|
|
.cra_type = &crypto_blkcipher_type,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_u = {
|
|
.blkcipher = {
|
|
.min_keysize = CAMELLIA_MIN_KEY_SIZE,
|
|
.max_keysize = CAMELLIA_MAX_KEY_SIZE,
|
|
.ivsize = CAMELLIA_BLOCK_SIZE,
|
|
.setkey = camellia_setkey,
|
|
.encrypt = ctr_crypt,
|
|
.decrypt = ctr_crypt,
|
|
},
|
|
},
|
|
}, {
|
|
.cra_name = "__lrw-camellia-aesni-avx2",
|
|
.cra_driver_name = "__driver-lrw-camellia-aesni-avx2",
|
|
.cra_priority = 0,
|
|
.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER |
|
|
CRYPTO_ALG_INTERNAL,
|
|
.cra_blocksize = CAMELLIA_BLOCK_SIZE,
|
|
.cra_ctxsize = sizeof(struct camellia_lrw_ctx),
|
|
.cra_alignmask = 0,
|
|
.cra_type = &crypto_blkcipher_type,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_exit = lrw_camellia_exit_tfm,
|
|
.cra_u = {
|
|
.blkcipher = {
|
|
.min_keysize = CAMELLIA_MIN_KEY_SIZE +
|
|
CAMELLIA_BLOCK_SIZE,
|
|
.max_keysize = CAMELLIA_MAX_KEY_SIZE +
|
|
CAMELLIA_BLOCK_SIZE,
|
|
.ivsize = CAMELLIA_BLOCK_SIZE,
|
|
.setkey = lrw_camellia_setkey,
|
|
.encrypt = lrw_encrypt,
|
|
.decrypt = lrw_decrypt,
|
|
},
|
|
},
|
|
}, {
|
|
.cra_name = "__xts-camellia-aesni-avx2",
|
|
.cra_driver_name = "__driver-xts-camellia-aesni-avx2",
|
|
.cra_priority = 0,
|
|
.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER |
|
|
CRYPTO_ALG_INTERNAL,
|
|
.cra_blocksize = CAMELLIA_BLOCK_SIZE,
|
|
.cra_ctxsize = sizeof(struct camellia_xts_ctx),
|
|
.cra_alignmask = 0,
|
|
.cra_type = &crypto_blkcipher_type,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_u = {
|
|
.blkcipher = {
|
|
.min_keysize = CAMELLIA_MIN_KEY_SIZE * 2,
|
|
.max_keysize = CAMELLIA_MAX_KEY_SIZE * 2,
|
|
.ivsize = CAMELLIA_BLOCK_SIZE,
|
|
.setkey = xts_camellia_setkey,
|
|
.encrypt = xts_encrypt,
|
|
.decrypt = xts_decrypt,
|
|
},
|
|
},
|
|
}, {
|
|
.cra_name = "ecb(camellia)",
|
|
.cra_driver_name = "ecb-camellia-aesni-avx2",
|
|
.cra_priority = 500,
|
|
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
|
|
.cra_blocksize = CAMELLIA_BLOCK_SIZE,
|
|
.cra_ctxsize = sizeof(struct async_helper_ctx),
|
|
.cra_alignmask = 0,
|
|
.cra_type = &crypto_ablkcipher_type,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_init = ablk_init,
|
|
.cra_exit = ablk_exit,
|
|
.cra_u = {
|
|
.ablkcipher = {
|
|
.min_keysize = CAMELLIA_MIN_KEY_SIZE,
|
|
.max_keysize = CAMELLIA_MAX_KEY_SIZE,
|
|
.setkey = ablk_set_key,
|
|
.encrypt = ablk_encrypt,
|
|
.decrypt = ablk_decrypt,
|
|
},
|
|
},
|
|
}, {
|
|
.cra_name = "cbc(camellia)",
|
|
.cra_driver_name = "cbc-camellia-aesni-avx2",
|
|
.cra_priority = 500,
|
|
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
|
|
.cra_blocksize = CAMELLIA_BLOCK_SIZE,
|
|
.cra_ctxsize = sizeof(struct async_helper_ctx),
|
|
.cra_alignmask = 0,
|
|
.cra_type = &crypto_ablkcipher_type,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_init = ablk_init,
|
|
.cra_exit = ablk_exit,
|
|
.cra_u = {
|
|
.ablkcipher = {
|
|
.min_keysize = CAMELLIA_MIN_KEY_SIZE,
|
|
.max_keysize = CAMELLIA_MAX_KEY_SIZE,
|
|
.ivsize = CAMELLIA_BLOCK_SIZE,
|
|
.setkey = ablk_set_key,
|
|
.encrypt = __ablk_encrypt,
|
|
.decrypt = ablk_decrypt,
|
|
},
|
|
},
|
|
}, {
|
|
.cra_name = "ctr(camellia)",
|
|
.cra_driver_name = "ctr-camellia-aesni-avx2",
|
|
.cra_priority = 500,
|
|
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
|
|
.cra_blocksize = 1,
|
|
.cra_ctxsize = sizeof(struct async_helper_ctx),
|
|
.cra_alignmask = 0,
|
|
.cra_type = &crypto_ablkcipher_type,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_init = ablk_init,
|
|
.cra_exit = ablk_exit,
|
|
.cra_u = {
|
|
.ablkcipher = {
|
|
.min_keysize = CAMELLIA_MIN_KEY_SIZE,
|
|
.max_keysize = CAMELLIA_MAX_KEY_SIZE,
|
|
.ivsize = CAMELLIA_BLOCK_SIZE,
|
|
.setkey = ablk_set_key,
|
|
.encrypt = ablk_encrypt,
|
|
.decrypt = ablk_encrypt,
|
|
.geniv = "chainiv",
|
|
},
|
|
},
|
|
}, {
|
|
.cra_name = "lrw(camellia)",
|
|
.cra_driver_name = "lrw-camellia-aesni-avx2",
|
|
.cra_priority = 500,
|
|
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
|
|
.cra_blocksize = CAMELLIA_BLOCK_SIZE,
|
|
.cra_ctxsize = sizeof(struct async_helper_ctx),
|
|
.cra_alignmask = 0,
|
|
.cra_type = &crypto_ablkcipher_type,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_init = ablk_init,
|
|
.cra_exit = ablk_exit,
|
|
.cra_u = {
|
|
.ablkcipher = {
|
|
.min_keysize = CAMELLIA_MIN_KEY_SIZE +
|
|
CAMELLIA_BLOCK_SIZE,
|
|
.max_keysize = CAMELLIA_MAX_KEY_SIZE +
|
|
CAMELLIA_BLOCK_SIZE,
|
|
.ivsize = CAMELLIA_BLOCK_SIZE,
|
|
.setkey = ablk_set_key,
|
|
.encrypt = ablk_encrypt,
|
|
.decrypt = ablk_decrypt,
|
|
},
|
|
},
|
|
}, {
|
|
.cra_name = "xts(camellia)",
|
|
.cra_driver_name = "xts-camellia-aesni-avx2",
|
|
.cra_priority = 500,
|
|
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
|
|
.cra_blocksize = CAMELLIA_BLOCK_SIZE,
|
|
.cra_ctxsize = sizeof(struct async_helper_ctx),
|
|
.cra_alignmask = 0,
|
|
.cra_type = &crypto_ablkcipher_type,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_init = ablk_init,
|
|
.cra_exit = ablk_exit,
|
|
.cra_u = {
|
|
.ablkcipher = {
|
|
.min_keysize = CAMELLIA_MIN_KEY_SIZE * 2,
|
|
.max_keysize = CAMELLIA_MAX_KEY_SIZE * 2,
|
|
.ivsize = CAMELLIA_BLOCK_SIZE,
|
|
.setkey = ablk_set_key,
|
|
.encrypt = ablk_encrypt,
|
|
.decrypt = ablk_decrypt,
|
|
},
|
|
},
|
|
} };
|
|
|
|
static int __init camellia_aesni_init(void)
|
|
{
|
|
const char *feature_name;
|
|
|
|
if (!cpu_has_avx2 || !cpu_has_avx || !cpu_has_aes || !cpu_has_osxsave) {
|
|
pr_info("AVX2 or AES-NI instructions are not detected.\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM,
|
|
&feature_name)) {
|
|
pr_info("CPU feature '%s' is not supported.\n", feature_name);
|
|
return -ENODEV;
|
|
}
|
|
|
|
return crypto_register_algs(cmll_algs, ARRAY_SIZE(cmll_algs));
|
|
}
|
|
|
|
static void __exit camellia_aesni_fini(void)
|
|
{
|
|
crypto_unregister_algs(cmll_algs, ARRAY_SIZE(cmll_algs));
|
|
}
|
|
|
|
module_init(camellia_aesni_init);
|
|
module_exit(camellia_aesni_fini);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_DESCRIPTION("Camellia Cipher Algorithm, AES-NI/AVX2 optimized");
|
|
MODULE_ALIAS_CRYPTO("camellia");
|
|
MODULE_ALIAS_CRYPTO("camellia-asm");
|