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b4e5219985
For performance and multi-chip support, use dynamic layout instead of
statically configured pools.
Divide the shared memory into the 3 64-bit aligned layouts listed below:
vpu->param_addr -> +-----------------------------------------+
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| To SCP : Input frame parameters |
| (struct img_ipi_frameparam) |
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+-----------------------------------------+
vpu->work_addr -> +-----------------------------------------+
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| In SCP : Reserve for SCP calculation |
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+-----------------------------------------+
vpu->config_addr -> +-----------------------------------------+
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| From SCP : Output component config |
| (struct img_config) |
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+-----------------------------------------+
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
48 lines
1023 B
C
48 lines
1023 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2022 MediaTek Inc.
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* Author: Ping-Hsun Wu <ping-hsun.wu@mediatek.com>
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*/
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#ifndef __MTK_MDP3_M2M_H__
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#define __MTK_MDP3_M2M_H__
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#include <media/v4l2-ctrls.h>
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#include "mtk-mdp3-core.h"
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#include "mtk-mdp3-vpu.h"
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#include "mtk-mdp3-regs.h"
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#define MDP_MAX_CTRLS 10
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enum {
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MDP_M2M_SRC = 0,
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MDP_M2M_DST = 1,
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MDP_M2M_MAX,
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};
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struct mdp_m2m_ctrls {
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struct v4l2_ctrl *hflip;
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struct v4l2_ctrl *vflip;
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struct v4l2_ctrl *rotate;
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};
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struct mdp_m2m_ctx {
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u32 id;
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struct mdp_dev *mdp_dev;
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struct v4l2_fh fh;
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struct v4l2_ctrl_handler ctrl_handler;
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struct mdp_m2m_ctrls ctrls;
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struct v4l2_m2m_ctx *m2m_ctx;
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u32 frame_count[MDP_M2M_MAX];
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struct mdp_frameparam curr_param;
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/* synchronization protect for mdp m2m context */
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struct mutex ctx_lock;
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};
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int mdp_m2m_device_register(struct mdp_dev *mdp);
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void mdp_m2m_device_unregister(struct mdp_dev *mdp);
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void mdp_m2m_job_finish(struct mdp_m2m_ctx *ctx);
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#endif /* __MTK_MDP3_M2M_H__ */
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