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Linus Torvalds eab4002660 RISC-V Patches for the 5.7 Merge Window, Part 1 
This tag contains the patches I'd like to target for 5.7.  It has a handful of
 new features:
 
 * Partial support for the Kendryte K210.  There are still a few outstanding
   issues that I have patches for, but I don't actually have a board to test
   them so they're not included yet.
 * SBI v0.2 support.
 * Fixes to support for building with LLVM-based toolchains.  The resulting
   images are known not to boot yet.
 
 This builds and boots for me.  There is one merge conflict, it's just a Kconfig
 merge issue.  I can publish a resolved branch if you'd like.
 
 I don't anticipate a part two, but I'll probably have something early in the
 RCs to finish up the K210 support.
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Merge tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V updates from Palmer Dabbelt:
 "This contains a handful of new features:

   - Partial support for the Kendryte K210.

     There are still a few outstanding issues that I have patches for,
     but I don't actually have a board to test them so they're not
     included yet.

   - SBI v0.2 support.

   - Fixes to support for building with LLVM-based toolchains. The
     resulting images are known not to boot yet.

  I don't anticipate a part two, but I'll probably have something early
  in the RCs to finish up the K210 support"

* tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (38 commits)
  riscv: create a loader.bin boot image for Kendryte SoC
  riscv: Kendryte K210 default config
  riscv: Add Kendryte K210 device tree
  riscv: Select required drivers for Kendryte SOC
  riscv: Add Kendryte K210 SoC support
  riscv: Add SOC early init support
  riscv: Unaligned load/store handling for M_MODE
  RISC-V: Support cpu hotplug
  RISC-V: Add supported for ordered booting method using HSM
  RISC-V: Add SBI HSM extension definitions
  RISC-V: Export SBI error to linux error mapping function
  RISC-V: Add cpu_ops and modify default booting method
  RISC-V: Move relocate and few other functions out of __init
  RISC-V: Implement new SBI v0.2 extensions
  RISC-V: Introduce a new config for SBI v0.1
  RISC-V: Add SBI v0.2 extension definitions
  RISC-V: Add basic support for SBI v0.2
  RISC-V: Mark existing SBI as 0.1 SBI.
  riscv: Use macro definition instead of magic number
  riscv: Add support to dump the kernel page tables
  ...
2020-04-09 10:51:30 -07:00
..
cacheflush.c riscv: export flush_icache_all to modules 2019-12-27 21:51:01 -08:00
context.c riscv: add nommu support 2019-11-17 15:17:39 -08:00
extable.c riscv: abstract out CSR names for supervisor vs machine mode 2019-11-05 09:20:42 -08:00
fault.c mm: allow VM_FAULT_RETRY for multiple times 2020-04-02 09:35:30 -07:00
hugetlbpage.c riscv: Use p*d_leaf macros to define p*d_huge 2020-03-05 13:09:59 -08:00
init.c RISC-V Patches for the 5.7 Merge Window, Part 1 2020-04-09 10:51:30 -07:00
kasan_init.c riscv: adjust the indent 2020-02-24 13:12:53 -08:00
Makefile riscv: Add support to dump the kernel page tables 2020-03-26 09:29:49 -07:00
pageattr.c riscv: add ARCH_SUPPORTS_DEBUG_PAGEALLOC support 2020-03-26 09:24:36 -07:00
physaddr.c riscv: mm: add support for CONFIG_DEBUG_VIRTUAL 2020-01-23 10:40:06 -08:00
ptdump.c riscv: Add support to dump the kernel page tables 2020-03-26 09:29:49 -07:00
tlbflush.c RISC-V: Issue a tlb page flush if possible 2019-10-29 11:32:18 -07:00