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873e65bc09
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation version 2 of the license this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 83 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070034.021731668@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
175 lines
2.3 KiB
ArmAsm
175 lines
2.3 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* PS3 bootwrapper hvcalls.
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*
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* Copyright (C) 2007 Sony Computer Entertainment Inc.
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* Copyright 2007 Sony Corp.
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*/
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#include "ppc_asm.h"
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.machine "ppc64"
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/*
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* The PS3 hypervisor uses a 64 bit "C" language calling convention.
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* The routines here marshal arguments between the 32 bit wrapper
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* program and the 64 bit hvcalls.
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*
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* wrapper lv1
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* 32-bit (h,l) 64-bit
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*
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* 1: r3,r4 <-> r3
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* 2: r5,r6 <-> r4
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* 3: r7,r8 <-> r5
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* 4: r9,r10 <-> r6
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* 5: 8(r1),12(r1) <-> r7
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* 6: 16(r1),20(r1) <-> r8
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* 7: 24(r1),28(r1) <-> r9
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* 8: 32(r1),36(r1) <-> r10
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*
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*/
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.macro GLOBAL name
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.section ".text"
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.balign 4
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.globl \name
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\name:
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.endm
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.macro NO_SUPPORT name
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GLOBAL \name
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b ps3_no_support
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.endm
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.macro HVCALL num
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li r11, \num
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.long 0x44000022
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extsw r3, r3
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.endm
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.macro SAVE_LR offset=4
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mflr r0
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stw r0, \offset(r1)
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.endm
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.macro LOAD_LR offset=4
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lwz r0, \offset(r1)
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mtlr r0
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.endm
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.macro LOAD_64_REG target,high,low
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sldi r11, \high, 32
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or \target, r11, \low
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.endm
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.macro LOAD_64_STACK target,offset
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ld \target, \offset(r1)
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.endm
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.macro LOAD_R3
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LOAD_64_REG r3,r3,r4
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.endm
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.macro LOAD_R4
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LOAD_64_REG r4,r5,r6
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.endm
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.macro LOAD_R5
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LOAD_64_REG r5,r7,r8
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.endm
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.macro LOAD_R6
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LOAD_64_REG r6,r9,r10
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.endm
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.macro LOAD_R7
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LOAD_64_STACK r7,8
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.endm
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.macro LOAD_R8
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LOAD_64_STACK r8,16
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.endm
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.macro LOAD_R9
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LOAD_64_STACK r9,24
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.endm
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.macro LOAD_R10
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LOAD_64_STACK r10,32
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.endm
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.macro LOAD_REGS_0
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stwu 1,-16(1)
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stw 3, 8(1)
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.endm
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.macro LOAD_REGS_5
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LOAD_R3
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LOAD_R4
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LOAD_R5
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LOAD_R6
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LOAD_R7
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.endm
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.macro LOAD_REGS_6
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LOAD_REGS_5
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LOAD_R8
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.endm
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.macro LOAD_REGS_8
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LOAD_REGS_6
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LOAD_R9
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LOAD_R10
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.endm
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.macro STORE_REGS_0_1
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lwz r11, 8(r1)
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std r4, 0(r11)
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mr r4, r3
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li r3, 0
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addi r1,r1,16
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.endm
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.macro STORE_REGS_5_2
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lwz r11, 16(r1)
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std r4, 0(r11)
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lwz r11, 20(r1)
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std r5, 0(r11)
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.endm
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.macro STORE_REGS_6_1
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lwz r11, 24(r1)
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std r4, 0(r11)
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.endm
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GLOBAL lv1_get_logical_ppe_id
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SAVE_LR
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LOAD_REGS_0
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HVCALL 69
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STORE_REGS_0_1
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LOAD_LR
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blr
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GLOBAL lv1_get_logical_partition_id
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SAVE_LR
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LOAD_REGS_0
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HVCALL 74
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STORE_REGS_0_1
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LOAD_LR
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blr
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GLOBAL lv1_get_repository_node_value
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SAVE_LR
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LOAD_REGS_5
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HVCALL 91
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STORE_REGS_5_2
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LOAD_LR
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blr
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GLOBAL lv1_panic
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SAVE_LR
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LOAD_REGS_8
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HVCALL 255
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LOAD_LR
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blr
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