mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-23 04:34:11 +08:00
c50fc2622c
Signed-off-by: Quan Nguyen <qnguyen@apm.com> Signed-off-by: Iyappan Subramanian <isubramanian@apm.com> Tested-by: Fushen Chen <fchen@apm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
92 lines
3.2 KiB
Plaintext
92 lines
3.2 KiB
Plaintext
APM X-Gene SoC Ethernet nodes
|
|
|
|
Ethernet nodes are defined to describe on-chip ethernet interfaces in
|
|
APM X-Gene SoC.
|
|
|
|
Required properties for all the ethernet interfaces:
|
|
- compatible: Should state binding information from the following list,
|
|
- "apm,xgene-enet": RGMII based 1G interface
|
|
- "apm,xgene1-sgenet": SGMII based 1G interface
|
|
- "apm,xgene1-xgenet": XFI based 10G interface
|
|
- reg: Address and length of the register set for the device. It contains the
|
|
information of registers in the same order as described by reg-names
|
|
- reg-names: Should contain the register set names
|
|
- "enet_csr": Ethernet control and status register address space
|
|
- "ring_csr": Descriptor ring control and status register address space
|
|
- "ring_cmd": Descriptor ring command register address space
|
|
- interrupts: Two interrupt specifiers can be specified.
|
|
- First is the Rx interrupt. This irq is mandatory.
|
|
- Second is the Tx completion interrupt.
|
|
This is supported only on SGMII based 1GbE and 10GbE interfaces.
|
|
- channel: Ethernet to CPU, start channel (prefetch buffer) number
|
|
- Must map to the first irq and irqs must be sequential
|
|
- port-id: Port number (0 or 1)
|
|
- clocks: Reference to the clock entry.
|
|
- local-mac-address: MAC address assigned to this device
|
|
- phy-connection-type: Interface type between ethernet device and PHY device
|
|
|
|
Required properties for ethernet interfaces that have external PHY:
|
|
- phy-handle: Reference to a PHY node connected to this device
|
|
|
|
- mdio: Device tree subnode with the following required properties:
|
|
- compatible: Must be "apm,xgene-mdio".
|
|
- #address-cells: Must be <1>.
|
|
- #size-cells: Must be <0>.
|
|
|
|
For the phy on the mdio bus, there must be a node with the following fields:
|
|
- compatible: PHY identifier. Please refer ./phy.txt for the format.
|
|
- reg: The ID number for the phy.
|
|
|
|
Optional properties:
|
|
- status: Should be "ok" or "disabled" for enabled/disabled. Default is "ok".
|
|
- tx-delay: Delay value for RGMII bridge TX clock.
|
|
Valid values are between 0 to 7, that maps to
|
|
417, 717, 1020, 1321, 1611, 1913, 2215, 2514 ps
|
|
Default value is 4, which corresponds to 1611 ps
|
|
- rx-delay: Delay value for RGMII bridge RX clock.
|
|
Valid values are between 0 to 7, that maps to
|
|
273, 589, 899, 1222, 1480, 1806, 2147, 2464 ps
|
|
Default value is 2, which corresponds to 899 ps
|
|
- rxlos-gpios: Input gpio from SFP+ module to indicate availability of
|
|
incoming signal.
|
|
|
|
|
|
Example:
|
|
menetclk: menetclk {
|
|
compatible = "apm,xgene-device-clock";
|
|
clock-output-names = "menetclk";
|
|
status = "ok";
|
|
};
|
|
|
|
menet: ethernet@17020000 {
|
|
compatible = "apm,xgene-enet";
|
|
status = "disabled";
|
|
reg = <0x0 0x17020000 0x0 0xd100>,
|
|
<0x0 0x17030000 0x0 0x400>,
|
|
<0x0 0x10000000 0x0 0x200>;
|
|
reg-names = "enet_csr", "ring_csr", "ring_cmd";
|
|
interrupts = <0x0 0x3c 0x4>;
|
|
port-id = <0>;
|
|
clocks = <&menetclk 0>;
|
|
local-mac-address = [00 01 73 00 00 01];
|
|
phy-connection-type = "rgmii";
|
|
phy-handle = <&menetphy>;
|
|
mdio {
|
|
compatible = "apm,xgene-mdio";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
menetphy: menetphy@3 {
|
|
compatible = "ethernet-phy-id001c.c915";
|
|
reg = <0x3>;
|
|
};
|
|
|
|
};
|
|
};
|
|
|
|
/* Board-specific peripheral configurations */
|
|
&menet {
|
|
tx-delay = <4>;
|
|
rx-delay = <2>;
|
|
status = "ok";
|
|
};
|