mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-29 23:53:55 +08:00
334ab91d58
This patch fixes a bug in pinctrl setup of serial2 device, Some of the pins in the pinctrl node of serial2 do not belong to that pin-controller. This patch divides them in the pins into there respective pin controller nodes. Without this patch serial on StiH416-B2000 Board will not work as it fails with: "st-pinctrl pin-controller-rear.3: failed to get pin(99) name st-pinctrl pin-controller-rear.3: maps: function serial2 group serial2-0 num 4 pinconfig core: failed to register map default (3): no group/pin given" Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
97 lines
2.4 KiB
Plaintext
97 lines
2.4 KiB
Plaintext
/*
|
|
* Copyright (C) 2012 STMicroelectronics Limited.
|
|
* Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* publishhed by the Free Software Foundation.
|
|
*/
|
|
#include "stih41x.dtsi"
|
|
#include "stih416-clock.dtsi"
|
|
#include "stih416-pinctrl.dtsi"
|
|
/ {
|
|
L2: cache-controller {
|
|
compatible = "arm,pl310-cache";
|
|
reg = <0xfffe2000 0x1000>;
|
|
arm,data-latency = <3 3 3>;
|
|
arm,tag-latency = <2 2 2>;
|
|
cache-unified;
|
|
cache-level = <2>;
|
|
};
|
|
|
|
soc {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
interrupt-parent = <&intc>;
|
|
ranges;
|
|
compatible = "simple-bus";
|
|
|
|
syscfg_sbc:sbc-syscfg@fe600000{
|
|
compatible = "st,stih416-sbc-syscfg", "syscon";
|
|
reg = <0xfe600000 0x1000>;
|
|
};
|
|
|
|
syscfg_front:front-syscfg@fee10000{
|
|
compatible = "st,stih416-front-syscfg", "syscon";
|
|
reg = <0xfee10000 0x1000>;
|
|
};
|
|
|
|
syscfg_rear:rear-syscfg@fe830000{
|
|
compatible = "st,stih416-rear-syscfg", "syscon";
|
|
reg = <0xfe830000 0x1000>;
|
|
};
|
|
|
|
/* MPE */
|
|
syscfg_fvdp_fe:fvdp-fe-syscfg@fddf0000{
|
|
compatible = "st,stih416-fvdp-fe-syscfg", "syscon";
|
|
reg = <0xfddf0000 0x1000>;
|
|
};
|
|
|
|
syscfg_fvdp_lite:fvdp-lite-syscfg@fd6a0000{
|
|
compatible = "st,stih416-fvdp-lite-syscfg", "syscon";
|
|
reg = <0xfd6a0000 0x1000>;
|
|
};
|
|
|
|
syscfg_cpu:cpu-syscfg@fdde0000{
|
|
compatible = "st,stih416-cpu-syscfg", "syscon";
|
|
reg = <0xfdde0000 0x1000>;
|
|
};
|
|
|
|
syscfg_compo:compo-syscfg@fd320000{
|
|
compatible = "st,stih416-compo-syscfg", "syscon";
|
|
reg = <0xfd320000 0x1000>;
|
|
};
|
|
|
|
syscfg_transport:transport-syscfg@fd690000{
|
|
compatible = "st,stih416-transport-syscfg", "syscon";
|
|
reg = <0xfd690000 0x1000>;
|
|
};
|
|
|
|
syscfg_lpm:lpm-syscfg@fe4b5100{
|
|
compatible = "st,stih416-lpm-syscfg", "syscon";
|
|
reg = <0xfe4b5100 0x8>;
|
|
};
|
|
|
|
serial2: serial@fed32000{
|
|
compatible = "st,asc";
|
|
status = "disabled";
|
|
reg = <0xfed32000 0x2c>;
|
|
interrupts = <0 197 0>;
|
|
clocks = <&CLK_S_ICN_REG_0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_serial2 &pinctrl_serial2_oe>;
|
|
};
|
|
|
|
/* SBC_UART1 */
|
|
sbc_serial1: serial@fe531000 {
|
|
compatible = "st,asc";
|
|
status = "disabled";
|
|
reg = <0xfe531000 0x2c>;
|
|
interrupts = <0 210 0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_sbc_serial1>;
|
|
clocks = <&CLK_SYSIN>;
|
|
};
|
|
};
|
|
};
|