mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-28 15:13:55 +08:00
b4e8c8dd84
This is a trivial 4xx plaform that uses the new simple bsp from Josh and is handy to use in simulators such as ISS or even Mambo who don't properly implement most of the actual devices in the SoC but really only the core. Signed-off-by: Torez Smith <lnxtorez@linux.vnet.ibm.com> Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
117 lines
2.8 KiB
Plaintext
117 lines
2.8 KiB
Plaintext
/*
|
|
* Device Tree Source for IBM Embedded PPC 476 Platform
|
|
*
|
|
* Copyright 2010 Torez Smith, IBM Corporation.
|
|
*
|
|
* Based on earlier code:
|
|
* Copyright (c) 2006, 2007 IBM Corp.
|
|
* Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
|
|
*
|
|
* This file is licensed under the terms of the GNU General Public
|
|
* License version 2. This program is licensed "as is" without
|
|
* any warranty of any kind, whether express or implied.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
/ {
|
|
#address-cells = <2>;
|
|
#size-cells = <1>;
|
|
model = "ibm,iss-4xx";
|
|
compatible = "ibm,iss-4xx";
|
|
dcr-parent = <&{/cpus/cpu@0}>;
|
|
|
|
aliases {
|
|
serial0 = &UART0;
|
|
};
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
cpu@0 {
|
|
device_type = "cpu";
|
|
model = "PowerPC,4xx"; // real CPU changed in sim
|
|
reg = <0x00000000>;
|
|
clock-frequency = <100000000>; // 100Mhz :-)
|
|
timebase-frequency = <100000000>;
|
|
i-cache-line-size = <32>; // may need fixup in sim
|
|
d-cache-line-size = <32>; // may need fixup in sim
|
|
i-cache-size = <32768>; /* may need fixup in sim */
|
|
d-cache-size = <32768>; /* may need fixup in sim */
|
|
dcr-controller;
|
|
dcr-access-method = "native";
|
|
};
|
|
};
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
|
|
};
|
|
|
|
UIC0: interrupt-controller0 {
|
|
compatible = "ibm,uic-4xx", "ibm,uic";
|
|
interrupt-controller;
|
|
cell-index = <0>;
|
|
dcr-reg = <0x0c0 0x009>;
|
|
#address-cells = <0>;
|
|
#size-cells = <0>;
|
|
#interrupt-cells = <2>;
|
|
|
|
};
|
|
|
|
UIC1: interrupt-controller1 {
|
|
compatible = "ibm,uic-4xx", "ibm,uic";
|
|
interrupt-controller;
|
|
cell-index = <1>;
|
|
dcr-reg = <0x0d0 0x009>;
|
|
#address-cells = <0>;
|
|
#size-cells = <0>;
|
|
#interrupt-cells = <2>;
|
|
interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
|
|
interrupt-parent = <&UIC0>;
|
|
};
|
|
|
|
plb {
|
|
compatible = "ibm,plb-4xx", "ibm,plb4"; /* Could be PLB6, doesn't matter */
|
|
#address-cells = <2>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
clock-frequency = <0>; // Filled in by zImage
|
|
|
|
POB0: opb {
|
|
compatible = "ibm,opb-4xx", "ibm,opb";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
/* Wish there was a nicer way of specifying a full 32-bit
|
|
range */
|
|
ranges = <0x00000000 0x00000001 0x00000000 0x80000000
|
|
0x80000000 0x00000001 0x80000000 0x80000000>;
|
|
clock-frequency = <0>; // Filled in by zImage
|
|
UART0: serial@40000200 {
|
|
device_type = "serial";
|
|
compatible = "ns16550a";
|
|
reg = <0x40000200 0x00000008>;
|
|
virtual-reg = <0xe0000200>;
|
|
clock-frequency = <11059200>;
|
|
current-speed = <115200>;
|
|
interrupt-parent = <&UIC0>;
|
|
interrupts = <0x0 0x4>;
|
|
};
|
|
};
|
|
};
|
|
|
|
nvrtc {
|
|
compatible = "ds1743-nvram", "ds1743", "rtc-ds1743";
|
|
reg = <0 0xEF703000 0x2000>;
|
|
};
|
|
iss-block {
|
|
compatible = "ibm,iss-sim-block-device";
|
|
reg = <0 0xEF701000 0x1000>;
|
|
};
|
|
|
|
chosen {
|
|
linux,stdout-path = "/plb/opb/serial@40000200";
|
|
};
|
|
};
|