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a1e6b41e8e
The PNX4008 header file is using the generic gpio and gpiolib namespace in <mach/gpio.h> yet the GPIO interface is not generic at all so rename it to <mach/gpio-pnx4008.h> This fixes a build failure in current -next: the includes were changed from <mach/gpio.h> to <linux/gpio.h> but since this platform isn't using generic gpio <linux/gpio.h> did not include <mach/gpio.h> and things broke apart. Acked-by: Vitaly Wool <vitalywool@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
68 lines
1.6 KiB
C
68 lines
1.6 KiB
C
/*
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* linux/arch/arm/mach-pnx4008/serial.c
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*
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* PNX4008 UART initialization
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*
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* Copyright: MontaVista Software Inc. (c) 2005
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/io.h>
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#include <mach/platform.h>
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#include <mach/hardware.h>
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#include <linux/serial_core.h>
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#include <linux/serial_reg.h>
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#include <mach/gpio-pnx4008.h>
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#include <mach/clock.h>
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#define UART_3 0
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#define UART_4 1
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#define UART_5 2
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#define UART_6 3
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#define UART_UNKNOWN (-1)
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#define UART3_BASE_VA IO_ADDRESS(PNX4008_UART3_BASE)
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#define UART4_BASE_VA IO_ADDRESS(PNX4008_UART4_BASE)
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#define UART5_BASE_VA IO_ADDRESS(PNX4008_UART5_BASE)
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#define UART6_BASE_VA IO_ADDRESS(PNX4008_UART6_BASE)
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#define UART_FCR_OFFSET 8
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#define UART_FIFO_SIZE 64
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void pnx4008_uart_init(void)
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{
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u32 tmp;
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int i = UART_FIFO_SIZE;
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__raw_writel(0xC1, UART5_BASE_VA + UART_FCR_OFFSET);
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__raw_writel(0xC1, UART3_BASE_VA + UART_FCR_OFFSET);
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/* Send a NULL to fix the UART HW bug */
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__raw_writel(0x00, UART5_BASE_VA);
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__raw_writel(0x00, UART3_BASE_VA);
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while (i--) {
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tmp = __raw_readl(UART5_BASE_VA);
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tmp = __raw_readl(UART3_BASE_VA);
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}
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__raw_writel(0, UART5_BASE_VA + UART_FCR_OFFSET);
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__raw_writel(0, UART3_BASE_VA + UART_FCR_OFFSET);
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/* setup wakeup interrupt */
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start_int_set_rising_edge(SE_U3_RX_INT);
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start_int_ack(SE_U3_RX_INT);
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start_int_umask(SE_U3_RX_INT);
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start_int_set_rising_edge(SE_U5_RX_INT);
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start_int_ack(SE_U5_RX_INT);
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start_int_umask(SE_U5_RX_INT);
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}
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