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This is the driver for the Powerventure PV88080 BUCKs regulator. It communicates via an I2C bus to the device. Signed-off-by: James Ban <James.Ban..opensource@diasemi.com> Signed-off-by: Mark Brown <broonie@kernel.org>
93 lines
3.0 KiB
C
93 lines
3.0 KiB
C
/*
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* pv88080-regulator.h - Regulator definitions for PV88080
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* Copyright (C) 2016 Powerventure Semiconductor Ltd.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __PV88080_REGISTERS_H__
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#define __PV88080_REGISTERS_H__
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/* System Control and Event Registers */
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#define PV88080_REG_EVENT_A 0x04
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#define PV88080_REG_MASK_A 0x09
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#define PV88080_REG_MASK_B 0x0a
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#define PV88080_REG_MASK_C 0x0b
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/* Regulator Registers */
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#define PV88080_REG_BUCK1_CONF0 0x27
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#define PV88080_REG_BUCK1_CONF1 0x28
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#define PV88080_REG_BUCK1_CONF2 0x59
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#define PV88080_REG_BUCK1_CONF5 0x5c
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#define PV88080_REG_BUCK2_CONF0 0x29
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#define PV88080_REG_BUCK2_CONF1 0x2a
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#define PV88080_REG_BUCK2_CONF2 0x61
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#define PV88080_REG_BUCK2_CONF5 0x64
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#define PV88080_REG_BUCK3_CONF0 0x2b
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#define PV88080_REG_BUCK3_CONF1 0x2c
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#define PV88080_REG_BUCK3_CONF2 0x69
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#define PV88080_REG_BUCK3_CONF5 0x6c
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/* PV88080_REG_EVENT_A (addr=0x04) */
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#define PV88080_E_VDD_FLT 0x01
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#define PV88080_E_OVER_TEMP 0x02
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/* PV88080_REG_MASK_A (addr=0x09) */
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#define PV88080_M_VDD_FLT 0x01
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#define PV88080_M_OVER_TEMP 0x02
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/* PV88080_REG_BUCK1_CONF0 (addr=0x27) */
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#define PV88080_BUCK1_EN 0x80
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#define PV88080_VBUCK1_MASK 0x7F
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/* PV88080_REG_BUCK2_CONF0 (addr=0x29) */
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#define PV88080_BUCK2_EN 0x80
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#define PV88080_VBUCK2_MASK 0x7F
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/* PV88080_REG_BUCK3_CONF0 (addr=0x2b) */
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#define PV88080_BUCK3_EN 0x80
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#define PV88080_VBUCK3_MASK 0x7F
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/* PV88080_REG_BUCK1_CONF1 (addr=0x28) */
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#define PV88080_BUCK1_ILIM_SHIFT 2
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#define PV88080_BUCK1_ILIM_MASK 0x0C
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#define PV88080_BUCK1_MODE_MASK 0x03
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/* PV88080_REG_BUCK2_CONF1 (addr=0x2a) */
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#define PV88080_BUCK2_ILIM_SHIFT 2
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#define PV88080_BUCK2_ILIM_MASK 0x0C
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#define PV88080_BUCK2_MODE_MASK 0x03
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/* PV88080_REG_BUCK3_CONF1 (addr=0x2c) */
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#define PV88080_BUCK3_ILIM_SHIFT 2
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#define PV88080_BUCK3_ILIM_MASK 0x0C
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#define PV88080_BUCK3_MODE_MASK 0x03
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#define PV88080_BUCK_MODE_SLEEP 0x00
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#define PV88080_BUCK_MODE_AUTO 0x01
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#define PV88080_BUCK_MODE_SYNC 0x02
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/* PV88080_REG_BUCK2_CONF2 (addr=0x61) */
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/* PV88080_REG_BUCK3_CONF2 (addr=0x69) */
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#define PV88080_BUCK_VDAC_RANGE_SHIFT 7
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#define PV88080_BUCK_VDAC_RANGE_MASK 0x01
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#define PV88080_BUCK_VDAC_RANGE_1 0x00
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#define PV88080_BUCK_VDAC_RANGE_2 0x01
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/* PV88080_REG_BUCK2_CONF5 (addr=0x64) */
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/* PV88080_REG_BUCK3_CONF5 (addr=0x6c) */
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#define PV88080_BUCK_VRANGE_GAIN_SHIFT 0
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#define PV88080_BUCK_VRANGE_GAIN_MASK 0x01
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#define PV88080_BUCK_VRANGE_GAIN_1 0x00
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#define PV88080_BUCK_VRANGE_GAIN_2 0x01
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#endif /* __PV88080_REGISTERS_H__ */
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