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e561aacc70
The S3C6400 EPLL code matches the S3C2416 and compatible SoCs, so move it from mach-s3c64xx into <plat/pll.h> for easy reuse. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
46 lines
1.3 KiB
C
46 lines
1.3 KiB
C
/* arch/arm/plat-s3c64xx/include/plat/pll.h
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*
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* Copyright 2008 Openmoko, Inc.
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* S3C64XX PLL code
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define S3C6400_PLL_MDIV_MASK ((1 << (25-16+1)) - 1)
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#define S3C6400_PLL_PDIV_MASK ((1 << (13-8+1)) - 1)
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#define S3C6400_PLL_SDIV_MASK ((1 << (2-0+1)) - 1)
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#define S3C6400_PLL_MDIV_SHIFT (16)
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#define S3C6400_PLL_PDIV_SHIFT (8)
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#define S3C6400_PLL_SDIV_SHIFT (0)
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#include <asm/div64.h>
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#include <plat/pll6553x.h>
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static inline unsigned long s3c6400_get_pll(unsigned long baseclk,
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u32 pllcon)
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{
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u32 mdiv, pdiv, sdiv;
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u64 fvco = baseclk;
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mdiv = (pllcon >> S3C6400_PLL_MDIV_SHIFT) & S3C6400_PLL_MDIV_MASK;
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pdiv = (pllcon >> S3C6400_PLL_PDIV_SHIFT) & S3C6400_PLL_PDIV_MASK;
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sdiv = (pllcon >> S3C6400_PLL_SDIV_SHIFT) & S3C6400_PLL_SDIV_MASK;
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fvco *= mdiv;
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do_div(fvco, (pdiv << sdiv));
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return (unsigned long)fvco;
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}
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static inline unsigned long s3c6400_get_epll(unsigned long baseclk)
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{
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return s3c_get_pll6553x(baseclk, __raw_readl(S3C_EPLL_CON0),
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__raw_readl(S3C_EPLL_CON1));
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}
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