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https://github.com/edk2-porting/linux-next.git
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30e1e28598
Migrate the Zynq platform and its drivers to use the new clock controller driver. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.cz> Cc: linux-serial@vger.kernel.org Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Mike Turquette <mturquette@linaro.org>
42 lines
1.4 KiB
Makefile
42 lines
1.4 KiB
Makefile
# common clock types
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obj-$(CONFIG_HAVE_CLK) += clk-devres.o
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obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o
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obj-$(CONFIG_COMMON_CLK) += clk.o
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obj-$(CONFIG_COMMON_CLK) += clk-divider.o
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obj-$(CONFIG_COMMON_CLK) += clk-fixed-factor.o
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obj-$(CONFIG_COMMON_CLK) += clk-fixed-rate.o
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obj-$(CONFIG_COMMON_CLK) += clk-gate.o
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obj-$(CONFIG_COMMON_CLK) += clk-mux.o
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obj-$(CONFIG_COMMON_CLK) += clk-composite.o
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# SoCs specific
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obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o
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obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o
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obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o
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obj-$(CONFIG_ARCH_MXS) += mxs/
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obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/
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obj-$(CONFIG_PLAT_SPEAR) += spear/
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obj-$(CONFIG_ARCH_U300) += clk-u300.o
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obj-$(CONFIG_COMMON_CLK_VERSATILE) += versatile/
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obj-$(CONFIG_ARCH_PRIMA2) += clk-prima2.o
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obj-$(CONFIG_PLAT_ORION) += mvebu/
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ifeq ($(CONFIG_COMMON_CLK), y)
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obj-$(CONFIG_ARCH_MMP) += mmp/
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endif
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obj-$(CONFIG_MACH_LOONGSON1) += clk-ls1x.o
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obj-$(CONFIG_ARCH_SUNXI) += sunxi/
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obj-$(CONFIG_ARCH_U8500) += ux500/
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obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o
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obj-$(CONFIG_ARCH_ZYNQ) += zynq/
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obj-$(CONFIG_ARCH_TEGRA) += tegra/
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obj-$(CONFIG_PLAT_SAMSUNG) += samsung/
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obj-$(CONFIG_X86) += x86/
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# Chip specific
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obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN) += clk-axi-clkgen.o
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obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
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obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o
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obj-$(CONFIG_COMMON_CLK_SI5351) += clk-si5351.o
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obj-$(CONFIG_CLK_TWL6040) += clk-twl6040.o
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