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0aec66d493
When booting up we need to wait for the modem processor to partially boot. This is because the modem processor does resource allocation for us. If we don't wait the modem won't honor our requests and we end up crashing or in an unknown state. This change just formalizes the waiting process. Signed-off-by: Daniel Walker <c_dwalke@quicinc.com>
259 lines
7.1 KiB
C
259 lines
7.1 KiB
C
/* arch/arm/mach-msm/proc_comm.h
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*
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* Copyright (c) 2007 QUALCOMM Incorporated
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef _ARCH_ARM_MACH_MSM_PROC_COMM_H_
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#define _ARCH_ARM_MACH_MSM_PROC_COMM_H_
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#include <linux/init.h>
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enum {
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PCOM_CMD_IDLE = 0x0,
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PCOM_CMD_DONE,
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PCOM_RESET_APPS,
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PCOM_RESET_CHIP,
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PCOM_CONFIG_NAND_MPU,
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PCOM_CONFIG_USB_CLKS,
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PCOM_GET_POWER_ON_STATUS,
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PCOM_GET_WAKE_UP_STATUS,
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PCOM_GET_BATT_LEVEL,
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PCOM_CHG_IS_CHARGING,
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PCOM_POWER_DOWN,
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PCOM_USB_PIN_CONFIG,
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PCOM_USB_PIN_SEL,
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PCOM_SET_RTC_ALARM,
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PCOM_NV_READ,
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PCOM_NV_WRITE,
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PCOM_GET_UUID_HIGH,
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PCOM_GET_UUID_LOW,
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PCOM_GET_HW_ENTROPY,
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PCOM_RPC_GPIO_TLMM_CONFIG_REMOTE,
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PCOM_CLKCTL_RPC_ENABLE,
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PCOM_CLKCTL_RPC_DISABLE,
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PCOM_CLKCTL_RPC_RESET,
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PCOM_CLKCTL_RPC_SET_FLAGS,
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PCOM_CLKCTL_RPC_SET_RATE,
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PCOM_CLKCTL_RPC_MIN_RATE,
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PCOM_CLKCTL_RPC_MAX_RATE,
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PCOM_CLKCTL_RPC_RATE,
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PCOM_CLKCTL_RPC_PLL_REQUEST,
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PCOM_CLKCTL_RPC_ENABLED,
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PCOM_VREG_SWITCH,
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PCOM_VREG_SET_LEVEL,
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PCOM_GPIO_TLMM_CONFIG_GROUP,
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PCOM_GPIO_TLMM_UNCONFIG_GROUP,
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PCOM_NV_WRITE_BYTES_4_7,
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PCOM_CONFIG_DISP,
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PCOM_GET_FTM_BOOT_COUNT,
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PCOM_RPC_GPIO_TLMM_CONFIG_EX,
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PCOM_PM_MPP_CONFIG,
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PCOM_GPIO_IN,
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PCOM_GPIO_OUT,
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PCOM_RESET_MODEM,
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PCOM_RESET_CHIP_IMM,
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PCOM_PM_VID_EN,
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PCOM_VREG_PULLDOWN,
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PCOM_GET_MODEM_VERSION,
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PCOM_CLK_REGIME_SEC_RESET,
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PCOM_CLK_REGIME_SEC_RESET_ASSERT,
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PCOM_CLK_REGIME_SEC_RESET_DEASSERT,
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PCOM_CLK_REGIME_SEC_PLL_REQUEST_WRP,
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PCOM_CLK_REGIME_SEC_ENABLE,
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PCOM_CLK_REGIME_SEC_DISABLE,
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PCOM_CLK_REGIME_SEC_IS_ON,
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PCOM_CLK_REGIME_SEC_SEL_CLK_INV,
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PCOM_CLK_REGIME_SEC_SEL_CLK_SRC,
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PCOM_CLK_REGIME_SEC_SEL_CLK_DIV,
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PCOM_CLK_REGIME_SEC_ICODEC_CLK_ENABLE,
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PCOM_CLK_REGIME_SEC_ICODEC_CLK_DISABLE,
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PCOM_CLK_REGIME_SEC_SEL_SPEED,
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PCOM_CLK_REGIME_SEC_CONFIG_GP_CLK_WRP,
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PCOM_CLK_REGIME_SEC_CONFIG_MDH_CLK_WRP,
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PCOM_CLK_REGIME_SEC_USB_XTAL_ON,
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PCOM_CLK_REGIME_SEC_USB_XTAL_OFF,
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PCOM_CLK_REGIME_SEC_SET_QDSP_DME_MODE,
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PCOM_CLK_REGIME_SEC_SWITCH_ADSP_CLK,
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PCOM_CLK_REGIME_SEC_GET_MAX_ADSP_CLK_KHZ,
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PCOM_CLK_REGIME_SEC_GET_I2C_CLK_KHZ,
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PCOM_CLK_REGIME_SEC_MSM_GET_CLK_FREQ_KHZ,
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PCOM_CLK_REGIME_SEC_SEL_VFE_SRC,
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PCOM_CLK_REGIME_SEC_MSM_SEL_CAMCLK,
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PCOM_CLK_REGIME_SEC_MSM_SEL_LCDCLK,
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PCOM_CLK_REGIME_SEC_VFE_RAIL_OFF,
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PCOM_CLK_REGIME_SEC_VFE_RAIL_ON,
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PCOM_CLK_REGIME_SEC_GRP_RAIL_OFF,
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PCOM_CLK_REGIME_SEC_GRP_RAIL_ON,
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PCOM_CLK_REGIME_SEC_VDC_RAIL_OFF,
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PCOM_CLK_REGIME_SEC_VDC_RAIL_ON,
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PCOM_CLK_REGIME_SEC_LCD_CTRL,
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PCOM_CLK_REGIME_SEC_REGISTER_FOR_CPU_RESOURCE,
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PCOM_CLK_REGIME_SEC_DEREGISTER_FOR_CPU_RESOURCE,
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PCOM_CLK_REGIME_SEC_RESOURCE_REQUEST_WRP,
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PCOM_CLK_REGIME_MSM_SEC_SEL_CLK_OWNER,
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PCOM_CLK_REGIME_SEC_DEVMAN_REQUEST_WRP,
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PCOM_GPIO_CONFIG,
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PCOM_GPIO_CONFIGURE_GROUP,
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PCOM_GPIO_TLMM_SET_PORT,
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PCOM_GPIO_TLMM_CONFIG_EX,
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PCOM_SET_FTM_BOOT_COUNT,
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PCOM_RESERVED0,
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PCOM_RESERVED1,
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PCOM_CUSTOMER_CMD1,
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PCOM_CUSTOMER_CMD2,
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PCOM_CUSTOMER_CMD3,
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PCOM_CLK_REGIME_ENTER_APPSBL_CHG_MODE,
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PCOM_CLK_REGIME_EXIT_APPSBL_CHG_MODE,
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PCOM_CLK_REGIME_SEC_RAIL_DISABLE,
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PCOM_CLK_REGIME_SEC_RAIL_ENABLE,
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PCOM_CLK_REGIME_SEC_RAIL_CONTROL,
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PCOM_SET_SW_WATCHDOG_STATE,
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PCOM_PM_MPP_CONFIG_DIGITAL_INPUT,
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PCOM_PM_MPP_CONFIG_I_SINK,
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PCOM_RESERVED_101,
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PCOM_MSM_HSUSB_PHY_RESET,
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PCOM_GET_BATT_MV_LEVEL,
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PCOM_CHG_USB_IS_PC_CONNECTED,
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PCOM_CHG_USB_IS_CHARGER_CONNECTED,
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PCOM_CHG_USB_IS_DISCONNECTED,
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PCOM_CHG_USB_IS_AVAILABLE,
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PCOM_CLK_REGIME_SEC_MSM_SEL_FREQ,
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PCOM_CLK_REGIME_SEC_SET_PCLK_AXI_POLICY,
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PCOM_CLKCTL_RPC_RESET_ASSERT,
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PCOM_CLKCTL_RPC_RESET_DEASSERT,
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PCOM_CLKCTL_RPC_RAIL_ON,
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PCOM_CLKCTL_RPC_RAIL_OFF,
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PCOM_CLKCTL_RPC_RAIL_ENABLE,
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PCOM_CLKCTL_RPC_RAIL_DISABLE,
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PCOM_CLKCTL_RPC_RAIL_CONTROL,
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PCOM_CLKCTL_RPC_MIN_MSMC1,
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PCOM_NUM_CMDS,
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};
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enum {
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PCOM_INVALID_STATUS = 0x0,
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PCOM_READY,
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PCOM_CMD_RUNNING,
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PCOM_CMD_SUCCESS,
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PCOM_CMD_FAIL,
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PCOM_CMD_FAIL_FALSE_RETURNED,
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PCOM_CMD_FAIL_CMD_OUT_OF_BOUNDS_SERVER,
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PCOM_CMD_FAIL_CMD_OUT_OF_BOUNDS_CLIENT,
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PCOM_CMD_FAIL_CMD_UNREGISTERED,
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PCOM_CMD_FAIL_CMD_LOCKED,
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PCOM_CMD_FAIL_SERVER_NOT_YET_READY,
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PCOM_CMD_FAIL_BAD_DESTINATION,
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PCOM_CMD_FAIL_SERVER_RESET,
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PCOM_CMD_FAIL_SMSM_NOT_INIT,
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PCOM_CMD_FAIL_PROC_COMM_BUSY,
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PCOM_CMD_FAIL_PROC_COMM_NOT_INIT,
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};
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/* List of VREGs that support the Pull Down Resistor setting. */
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enum vreg_pdown_id {
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PM_VREG_PDOWN_MSMA_ID,
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PM_VREG_PDOWN_MSMP_ID,
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PM_VREG_PDOWN_MSME1_ID, /* Not supported in Panoramix */
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PM_VREG_PDOWN_MSMC1_ID, /* Not supported in PM6620 */
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PM_VREG_PDOWN_MSMC2_ID, /* Supported in PM7500 only */
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PM_VREG_PDOWN_GP3_ID, /* Supported in PM7500 only */
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PM_VREG_PDOWN_MSME2_ID, /* Supported in PM7500 and Panoramix only */
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PM_VREG_PDOWN_GP4_ID, /* Supported in PM7500 only */
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PM_VREG_PDOWN_GP1_ID, /* Supported in PM7500 only */
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PM_VREG_PDOWN_TCXO_ID,
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PM_VREG_PDOWN_PA_ID,
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PM_VREG_PDOWN_RFTX_ID,
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PM_VREG_PDOWN_RFRX1_ID,
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PM_VREG_PDOWN_RFRX2_ID,
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PM_VREG_PDOWN_SYNT_ID,
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PM_VREG_PDOWN_WLAN_ID,
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PM_VREG_PDOWN_USB_ID,
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PM_VREG_PDOWN_MMC_ID,
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PM_VREG_PDOWN_RUIM_ID,
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PM_VREG_PDOWN_MSMC0_ID, /* Supported in PM6610 only */
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PM_VREG_PDOWN_GP2_ID, /* Supported in PM7500 only */
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PM_VREG_PDOWN_GP5_ID, /* Supported in PM7500 only */
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PM_VREG_PDOWN_GP6_ID, /* Supported in PM7500 only */
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PM_VREG_PDOWN_RF_ID,
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PM_VREG_PDOWN_RF_VCO_ID,
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PM_VREG_PDOWN_MPLL_ID,
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PM_VREG_PDOWN_S2_ID,
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PM_VREG_PDOWN_S3_ID,
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PM_VREG_PDOWN_RFUBM_ID,
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/* new for HAN */
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PM_VREG_PDOWN_RF1_ID,
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PM_VREG_PDOWN_RF2_ID,
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PM_VREG_PDOWN_RFA_ID,
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PM_VREG_PDOWN_CDC2_ID,
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PM_VREG_PDOWN_RFTX2_ID,
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PM_VREG_PDOWN_USIM_ID,
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PM_VREG_PDOWN_USB2P6_ID,
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PM_VREG_PDOWN_USB3P3_ID,
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PM_VREG_PDOWN_INVALID_ID,
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/* backward compatible enums only */
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PM_VREG_PDOWN_CAM_ID = PM_VREG_PDOWN_GP1_ID,
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PM_VREG_PDOWN_MDDI_ID = PM_VREG_PDOWN_GP2_ID,
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PM_VREG_PDOWN_RUIM2_ID = PM_VREG_PDOWN_GP3_ID,
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PM_VREG_PDOWN_AUX_ID = PM_VREG_PDOWN_GP4_ID,
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PM_VREG_PDOWN_AUX2_ID = PM_VREG_PDOWN_GP5_ID,
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PM_VREG_PDOWN_BT_ID = PM_VREG_PDOWN_GP6_ID,
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PM_VREG_PDOWN_MSME_ID = PM_VREG_PDOWN_MSME1_ID,
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PM_VREG_PDOWN_MSMC_ID = PM_VREG_PDOWN_MSMC1_ID,
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PM_VREG_PDOWN_RFA1_ID = PM_VREG_PDOWN_RFRX2_ID,
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PM_VREG_PDOWN_RFA2_ID = PM_VREG_PDOWN_RFTX2_ID,
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PM_VREG_PDOWN_XO_ID = PM_VREG_PDOWN_TCXO_ID
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};
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enum {
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PCOM_CLKRGM_APPS_RESET_USB_PHY = 34,
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PCOM_CLKRGM_APPS_RESET_USBH = 37,
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};
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/* gpio info for PCOM_RPC_GPIO_TLMM_CONFIG_EX */
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#define GPIO_ENABLE 0
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#define GPIO_DISABLE 1
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#define GPIO_INPUT 0
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#define GPIO_OUTPUT 1
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#define GPIO_NO_PULL 0
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#define GPIO_PULL_DOWN 1
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#define GPIO_KEEPER 2
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#define GPIO_PULL_UP 3
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#define GPIO_2MA 0
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#define GPIO_4MA 1
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#define GPIO_6MA 2
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#define GPIO_8MA 3
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#define GPIO_10MA 4
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#define GPIO_12MA 5
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#define GPIO_14MA 6
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#define GPIO_16MA 7
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#define PCOM_GPIO_CFG(gpio, func, dir, pull, drvstr) \
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((((gpio) & 0x3FF) << 4) | \
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((func) & 0xf) | \
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(((dir) & 0x1) << 14) | \
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(((pull) & 0x3) << 15) | \
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(((drvstr) & 0xF) << 17))
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int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2);
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void __init proc_comm_boot_wait(void);
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#endif
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