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07b0e7d49c
This patch adds support for the AXI Central Direct Memory Access (AXI CDMA) core to the existing vdma driver, AXI CDMA is a soft Xilinx IP core that provides high-bandwidth Direct Memory Access(DMA) between a memory-mapped source address and a memory-mapped destination address. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
62 lines
1.4 KiB
C
62 lines
1.4 KiB
C
/*
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* Xilinx DMA Engine drivers support header file
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*
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* Copyright (C) 2010-2014 Xilinx, Inc. All rights reserved.
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*
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* This is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __DMA_XILINX_DMA_H
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#define __DMA_XILINX_DMA_H
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#include <linux/dma-mapping.h>
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#include <linux/dmaengine.h>
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/**
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* struct xilinx_vdma_config - VDMA Configuration structure
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* @frm_dly: Frame delay
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* @gen_lock: Whether in gen-lock mode
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* @master: Master that it syncs to
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* @frm_cnt_en: Enable frame count enable
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* @park: Whether wants to park
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* @park_frm: Frame to park on
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* @coalesc: Interrupt coalescing threshold
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* @delay: Delay counter
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* @reset: Reset Channel
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* @ext_fsync: External Frame Sync source
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*/
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struct xilinx_vdma_config {
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int frm_dly;
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int gen_lock;
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int master;
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int frm_cnt_en;
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int park;
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int park_frm;
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int coalesc;
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int delay;
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int reset;
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int ext_fsync;
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};
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/**
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* enum xdma_ip_type: DMA IP type.
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*
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* XDMA_TYPE_AXIDMA: Axi dma ip.
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* XDMA_TYPE_CDMA: Axi cdma ip.
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* XDMA_TYPE_VDMA: Axi vdma ip.
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*
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*/
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enum xdma_ip_type {
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XDMA_TYPE_AXIDMA = 0,
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XDMA_TYPE_CDMA,
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XDMA_TYPE_VDMA,
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};
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int xilinx_vdma_channel_set_config(struct dma_chan *dchan,
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struct xilinx_vdma_config *cfg);
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#endif
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