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f1b1eabff0
Right now, satellite frontend drivers specify frequencies in kHz, while terrestrial/cable ones specify in Hz. That's confusing for developers. However, the main problem is that universal frontends capable of handling both satellite and non-satelite delivery systems are appearing. We end by needing to hack the drivers in order to support such hybrid frontends. So, convert everything to specify frontend frequencies in Hz. Tested-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
529 lines
14 KiB
C
529 lines
14 KiB
C
/*
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TDA10021 - Single Chip Cable Channel Receiver driver module
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used on the Siemens DVB-C cards
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Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
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Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
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Support for TDA10021
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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#include <media/dvb_frontend.h>
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#include "tda1002x.h"
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struct tda10021_state {
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struct i2c_adapter* i2c;
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/* configuration settings */
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const struct tda1002x_config* config;
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struct dvb_frontend frontend;
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u8 pwm;
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u8 reg0;
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};
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#if 0
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#define dprintk(x...) printk(x)
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#else
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#define dprintk(x...)
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#endif
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static int verbose;
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#define XIN 57840000UL
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#define FIN (XIN >> 4)
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static int tda10021_inittab_size = 0x40;
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static u8 tda10021_inittab[0x40]=
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{
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0x73, 0x6a, 0x23, 0x0a, 0x02, 0x37, 0x77, 0x1a,
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0x37, 0x6a, 0x17, 0x8a, 0x1e, 0x86, 0x43, 0x40,
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0xb8, 0x3f, 0xa1, 0x00, 0xcd, 0x01, 0x00, 0xff,
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0x11, 0x00, 0x7c, 0x31, 0x30, 0x20, 0x00, 0x00,
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0x02, 0x00, 0x00, 0x7d, 0x00, 0x00, 0x00, 0x00,
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0x07, 0x00, 0x33, 0x11, 0x0d, 0x95, 0x08, 0x58,
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0x00, 0x00, 0x80, 0x00, 0x80, 0xff, 0x00, 0x00,
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0x04, 0x2d, 0x2f, 0xff, 0x00, 0x00, 0x00, 0x00,
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};
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static int _tda10021_writereg (struct tda10021_state* state, u8 reg, u8 data)
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{
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u8 buf[] = { reg, data };
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struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
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int ret;
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ret = i2c_transfer (state->i2c, &msg, 1);
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if (ret != 1)
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printk("DVB: TDA10021(%d): %s, writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
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state->frontend.dvb->num, __func__, reg, data, ret);
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msleep(10);
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return (ret != 1) ? -EREMOTEIO : 0;
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}
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static u8 tda10021_readreg (struct tda10021_state* state, u8 reg)
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{
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u8 b0 [] = { reg };
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u8 b1 [] = { 0 };
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struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
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{ .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
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int ret;
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ret = i2c_transfer (state->i2c, msg, 2);
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// Don't print an error message if the id is read.
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if (ret != 2 && reg != 0x1a)
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printk("DVB: TDA10021: %s: readreg error (ret == %i)\n",
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__func__, ret);
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return b1[0];
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}
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//get access to tuner
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static int lock_tuner(struct tda10021_state* state)
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{
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u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] | 0x80 };
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struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
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if(i2c_transfer(state->i2c, &msg, 1) != 1)
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{
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printk("tda10021: lock tuner fails\n");
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return -EREMOTEIO;
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}
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return 0;
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}
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//release access from tuner
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static int unlock_tuner(struct tda10021_state* state)
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{
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u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] & 0x7f };
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struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
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if(i2c_transfer(state->i2c, &msg_post, 1) != 1)
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{
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printk("tda10021: unlock tuner fails\n");
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return -EREMOTEIO;
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}
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return 0;
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}
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static int tda10021_setup_reg0(struct tda10021_state *state, u8 reg0,
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enum fe_spectral_inversion inversion)
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{
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reg0 |= state->reg0 & 0x63;
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if ((INVERSION_ON == inversion) ^ (state->config->invert == 0))
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reg0 &= ~0x20;
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else
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reg0 |= 0x20;
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_tda10021_writereg (state, 0x00, reg0 & 0xfe);
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_tda10021_writereg (state, 0x00, reg0 | 0x01);
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state->reg0 = reg0;
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return 0;
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}
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static int tda10021_set_symbolrate (struct tda10021_state* state, u32 symbolrate)
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{
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s32 BDR;
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s32 BDRI;
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s16 SFIL=0;
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u16 NDEC = 0;
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u32 tmp, ratio;
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if (symbolrate > XIN/2)
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symbolrate = XIN/2;
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if (symbolrate < 500000)
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symbolrate = 500000;
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if (symbolrate < XIN/16) NDEC = 1;
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if (symbolrate < XIN/32) NDEC = 2;
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if (symbolrate < XIN/64) NDEC = 3;
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if (symbolrate < (u32)(XIN/12.3)) SFIL = 1;
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if (symbolrate < (u32)(XIN/16)) SFIL = 0;
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if (symbolrate < (u32)(XIN/24.6)) SFIL = 1;
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if (symbolrate < (u32)(XIN/32)) SFIL = 0;
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if (symbolrate < (u32)(XIN/49.2)) SFIL = 1;
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if (symbolrate < (u32)(XIN/64)) SFIL = 0;
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if (symbolrate < (u32)(XIN/98.4)) SFIL = 1;
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symbolrate <<= NDEC;
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ratio = (symbolrate << 4) / FIN;
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tmp = ((symbolrate << 4) % FIN) << 8;
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ratio = (ratio << 8) + tmp / FIN;
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tmp = (tmp % FIN) << 8;
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ratio = (ratio << 8) + DIV_ROUND_CLOSEST(tmp, FIN);
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BDR = ratio;
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BDRI = (((XIN << 5) / symbolrate) + 1) / 2;
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if (BDRI > 0xFF)
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BDRI = 0xFF;
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SFIL = (SFIL << 4) | tda10021_inittab[0x0E];
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NDEC = (NDEC << 6) | tda10021_inittab[0x03];
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_tda10021_writereg (state, 0x03, NDEC);
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_tda10021_writereg (state, 0x0a, BDR&0xff);
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_tda10021_writereg (state, 0x0b, (BDR>> 8)&0xff);
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_tda10021_writereg (state, 0x0c, (BDR>>16)&0x3f);
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_tda10021_writereg (state, 0x0d, BDRI);
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_tda10021_writereg (state, 0x0e, SFIL);
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return 0;
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}
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static int tda10021_init (struct dvb_frontend *fe)
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{
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struct tda10021_state* state = fe->demodulator_priv;
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int i;
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dprintk("DVB: TDA10021(%d): init chip\n", fe->adapter->num);
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//_tda10021_writereg (fe, 0, 0);
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for (i=0; i<tda10021_inittab_size; i++)
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_tda10021_writereg (state, i, tda10021_inittab[i]);
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_tda10021_writereg (state, 0x34, state->pwm);
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//Comment by markus
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//0x2A[3-0] == PDIV -> P multiplaying factor (P=PDIV+1)(default 0)
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//0x2A[4] == BYPPLL -> Power down mode (default 1)
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//0x2A[5] == LCK -> PLL Lock Flag
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//0x2A[6] == POLAXIN -> Polarity of the input reference clock (default 0)
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//Activate PLL
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_tda10021_writereg(state, 0x2a, tda10021_inittab[0x2a] & 0xef);
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return 0;
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}
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struct qam_params {
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u8 conf, agcref, lthr, mseth, aref;
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};
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static int tda10021_set_parameters(struct dvb_frontend *fe)
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{
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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u32 delsys = c->delivery_system;
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unsigned qam = c->modulation;
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bool is_annex_c;
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u32 reg0x3d;
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struct tda10021_state* state = fe->demodulator_priv;
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static const struct qam_params qam_params[] = {
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/* Modulation Conf AGCref LTHR MSETH AREF */
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[QPSK] = { 0x14, 0x78, 0x78, 0x8c, 0x96 },
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[QAM_16] = { 0x00, 0x8c, 0x87, 0xa2, 0x91 },
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[QAM_32] = { 0x04, 0x8c, 0x64, 0x74, 0x96 },
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[QAM_64] = { 0x08, 0x6a, 0x46, 0x43, 0x6a },
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[QAM_128] = { 0x0c, 0x78, 0x36, 0x34, 0x7e },
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[QAM_256] = { 0x10, 0x5c, 0x26, 0x23, 0x6b },
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};
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switch (delsys) {
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case SYS_DVBC_ANNEX_A:
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is_annex_c = false;
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break;
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case SYS_DVBC_ANNEX_C:
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is_annex_c = true;
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break;
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default:
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return -EINVAL;
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}
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/*
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* gcc optimizes the code below the same way as it would code:
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* "if (qam > 5) return -EINVAL;"
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* Yet, the code is clearer, as it shows what QAM standards are
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* supported by the driver, and avoids the usage of magic numbers on
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* it.
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*/
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switch (qam) {
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case QPSK:
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case QAM_16:
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case QAM_32:
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case QAM_64:
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case QAM_128:
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case QAM_256:
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break;
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default:
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return -EINVAL;
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}
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if (c->inversion != INVERSION_ON && c->inversion != INVERSION_OFF)
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return -EINVAL;
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/*printk("tda10021: set frequency to %d qam=%d symrate=%d\n", p->frequency,qam,p->symbol_rate);*/
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if (fe->ops.tuner_ops.set_params) {
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fe->ops.tuner_ops.set_params(fe);
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if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
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}
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tda10021_set_symbolrate(state, c->symbol_rate);
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_tda10021_writereg(state, 0x34, state->pwm);
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_tda10021_writereg(state, 0x01, qam_params[qam].agcref);
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_tda10021_writereg(state, 0x05, qam_params[qam].lthr);
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_tda10021_writereg(state, 0x08, qam_params[qam].mseth);
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_tda10021_writereg(state, 0x09, qam_params[qam].aref);
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/*
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* Bit 0 == 0 means roll-off = 0.15 (Annex A)
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* == 1 means roll-off = 0.13 (Annex C)
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*/
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reg0x3d = tda10021_readreg (state, 0x3d);
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if (is_annex_c)
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_tda10021_writereg (state, 0x3d, 0x01 | reg0x3d);
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else
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_tda10021_writereg (state, 0x3d, 0xfe & reg0x3d);
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tda10021_setup_reg0(state, qam_params[qam].conf, c->inversion);
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return 0;
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}
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static int tda10021_read_status(struct dvb_frontend *fe,
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enum fe_status *status)
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{
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struct tda10021_state* state = fe->demodulator_priv;
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int sync;
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*status = 0;
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//0x11[0] == EQALGO -> Equalizer algorithms state
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//0x11[1] == CARLOCK -> Carrier locked
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//0x11[2] == FSYNC -> Frame synchronisation
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//0x11[3] == FEL -> Front End locked
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//0x11[6] == NODVB -> DVB Mode Information
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sync = tda10021_readreg (state, 0x11);
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if (sync & 2)
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*status |= FE_HAS_SIGNAL|FE_HAS_CARRIER;
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if (sync & 4)
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*status |= FE_HAS_SYNC|FE_HAS_VITERBI;
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if (sync & 8)
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*status |= FE_HAS_LOCK;
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return 0;
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}
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static int tda10021_read_ber(struct dvb_frontend* fe, u32* ber)
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{
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struct tda10021_state* state = fe->demodulator_priv;
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u32 _ber = tda10021_readreg(state, 0x14) |
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(tda10021_readreg(state, 0x15) << 8) |
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((tda10021_readreg(state, 0x16) & 0x0f) << 16);
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_tda10021_writereg(state, 0x10, (tda10021_readreg(state, 0x10) & ~0xc0)
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| (tda10021_inittab[0x10] & 0xc0));
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*ber = 10 * _ber;
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return 0;
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}
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static int tda10021_read_signal_strength(struct dvb_frontend* fe, u16* strength)
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{
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struct tda10021_state* state = fe->demodulator_priv;
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u8 config = tda10021_readreg(state, 0x02);
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u8 gain = tda10021_readreg(state, 0x17);
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if (config & 0x02)
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/* the agc value is inverted */
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gain = ~gain;
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*strength = (gain << 8) | gain;
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return 0;
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}
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static int tda10021_read_snr(struct dvb_frontend* fe, u16* snr)
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{
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struct tda10021_state* state = fe->demodulator_priv;
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u8 quality = ~tda10021_readreg(state, 0x18);
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*snr = (quality << 8) | quality;
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return 0;
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}
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static int tda10021_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
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{
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struct tda10021_state* state = fe->demodulator_priv;
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*ucblocks = tda10021_readreg (state, 0x13) & 0x7f;
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if (*ucblocks == 0x7f)
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*ucblocks = 0xffffffff;
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/* reset uncorrected block counter */
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_tda10021_writereg (state, 0x10, tda10021_inittab[0x10] & 0xdf);
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_tda10021_writereg (state, 0x10, tda10021_inittab[0x10]);
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return 0;
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}
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static int tda10021_get_frontend(struct dvb_frontend *fe,
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struct dtv_frontend_properties *p)
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{
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struct tda10021_state* state = fe->demodulator_priv;
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int sync;
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s8 afc = 0;
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sync = tda10021_readreg(state, 0x11);
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afc = tda10021_readreg(state, 0x19);
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if (verbose) {
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/* AFC only valid when carrier has been recovered */
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printk(sync & 2 ? "DVB: TDA10021(%d): AFC (%d) %dHz\n" :
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"DVB: TDA10021(%d): [AFC (%d) %dHz]\n",
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state->frontend.dvb->num, afc,
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-((s32)p->symbol_rate * afc) >> 10);
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}
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p->inversion = ((state->reg0 & 0x20) == 0x20) ^ (state->config->invert != 0) ? INVERSION_ON : INVERSION_OFF;
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p->modulation = ((state->reg0 >> 2) & 7) + QAM_16;
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p->fec_inner = FEC_NONE;
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p->frequency = ((p->frequency + 31250) / 62500) * 62500;
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if (sync & 2)
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p->frequency -= ((s32)p->symbol_rate * afc) >> 10;
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return 0;
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}
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static int tda10021_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
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{
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struct tda10021_state* state = fe->demodulator_priv;
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if (enable) {
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lock_tuner(state);
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} else {
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unlock_tuner(state);
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}
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return 0;
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}
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static int tda10021_sleep(struct dvb_frontend* fe)
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{
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struct tda10021_state* state = fe->demodulator_priv;
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_tda10021_writereg (state, 0x1b, 0x02); /* pdown ADC */
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_tda10021_writereg (state, 0x00, 0x80); /* standby */
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return 0;
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}
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static void tda10021_release(struct dvb_frontend* fe)
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{
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struct tda10021_state* state = fe->demodulator_priv;
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kfree(state);
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}
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static const struct dvb_frontend_ops tda10021_ops;
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struct dvb_frontend* tda10021_attach(const struct tda1002x_config* config,
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struct i2c_adapter* i2c,
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u8 pwm)
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{
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struct tda10021_state* state = NULL;
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u8 id;
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/* allocate memory for the internal state */
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state = kzalloc(sizeof(struct tda10021_state), GFP_KERNEL);
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if (state == NULL) goto error;
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/* setup the state */
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state->config = config;
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state->i2c = i2c;
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state->pwm = pwm;
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state->reg0 = tda10021_inittab[0];
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/* check if the demod is there */
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id = tda10021_readreg(state, 0x1a);
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if ((id & 0xf0) != 0x70) goto error;
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/* Don't claim TDA10023 */
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if (id == 0x7d)
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goto error;
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printk("TDA10021: i2c-addr = 0x%02x, id = 0x%02x\n",
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state->config->demod_address, id);
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/* create dvb_frontend */
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memcpy(&state->frontend.ops, &tda10021_ops, sizeof(struct dvb_frontend_ops));
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state->frontend.demodulator_priv = state;
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return &state->frontend;
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error:
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kfree(state);
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return NULL;
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}
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static const struct dvb_frontend_ops tda10021_ops = {
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.delsys = { SYS_DVBC_ANNEX_A, SYS_DVBC_ANNEX_C },
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.info = {
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.name = "Philips TDA10021 DVB-C",
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.frequency_min_hz = 47 * MHz,
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.frequency_max_hz = 862 * MHz,
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.frequency_stepsize_hz = 62500,
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.symbol_rate_min = (XIN / 2) / 64, /* SACLK/64 == (XIN/2)/64 */
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.symbol_rate_max = (XIN / 2) / 4, /* SACLK/4 */
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#if 0
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.frequency_tolerance = ???,
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.symbol_rate_tolerance = ???, /* ppm */ /* == 8% (spec p. 5) */
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#endif
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.caps = 0x400 | //FE_CAN_QAM_4
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FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
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FE_CAN_QAM_128 | FE_CAN_QAM_256 |
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FE_CAN_FEC_AUTO
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},
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|
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.release = tda10021_release,
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.init = tda10021_init,
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.sleep = tda10021_sleep,
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.i2c_gate_ctrl = tda10021_i2c_gate_ctrl,
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|
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.set_frontend = tda10021_set_parameters,
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.get_frontend = tda10021_get_frontend,
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|
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.read_status = tda10021_read_status,
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.read_ber = tda10021_read_ber,
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.read_signal_strength = tda10021_read_signal_strength,
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.read_snr = tda10021_read_snr,
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.read_ucblocks = tda10021_read_ucblocks,
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};
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|
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module_param(verbose, int, 0644);
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MODULE_PARM_DESC(verbose, "print AFC offset after tuning for debugging the PWM setting");
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|
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MODULE_DESCRIPTION("Philips TDA10021 DVB-C demodulator driver");
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MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Markus Schulz");
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MODULE_LICENSE("GPL");
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EXPORT_SYMBOL(tda10021_attach);
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