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2e94ac4289
Under "arm/mach-exynos" many files are using PMU register offsets. Since we have added support for accessing PMU base address via DT, now we can remove PMU mapping from exynosX_iodesc. Let's convert all these access using iomapped address. This will help us in removing static mapping of PMU base address as well as help in reducing dependency over machine header files. Thus helping for migration of PMU implementation from machine to driver folder which can be reused for ARM64 based SoC. Also as we have removed static mappings from "regs-pmu.h" it does not need map.h anymore. But "platsmp.c" needed this and till now it got included indirectly. So lets move header inclusion of "mach/map.h" from "regs-pmu.h" to "platsmp.c". Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
70 lines
1.7 KiB
C
70 lines
1.7 KiB
C
/*
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* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* EXYNOS4 - Memory map definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_MAP_H
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#define __ASM_ARCH_MAP_H __FILE__
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#include <plat/map-base.h>
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/*
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* EXYNOS4 UART offset is 0x10000 but the older S5P SoCs are 0x400.
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* So need to define it, and here is to avoid redefinition warning.
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*/
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#define S3C_UART_OFFSET (0x10000)
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#include <plat/map-s5p.h>
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#define EXYNOS_PA_CHIPID 0x10000000
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#define EXYNOS4_PA_SYSCON 0x10010000
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#define EXYNOS5_PA_SYSCON 0x10050100
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#define EXYNOS4_PA_CMU 0x10030000
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#define EXYNOS5_PA_CMU 0x10010000
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#define EXYNOS4_PA_SYSTIMER 0x10050000
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#define EXYNOS4_PA_WATCHDOG 0x10060000
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#define EXYNOS5_PA_WATCHDOG 0x101D0000
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#define EXYNOS4_PA_DMC0 0x10400000
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#define EXYNOS4_PA_DMC1 0x10410000
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#define EXYNOS4_PA_COMBINER 0x10440000
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#define EXYNOS5_PA_COMBINER 0x10440000
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#define EXYNOS4_PA_GIC_CPU 0x10480000
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#define EXYNOS4_PA_GIC_DIST 0x10490000
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#define EXYNOS5_PA_GIC_CPU 0x10482000
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#define EXYNOS5_PA_GIC_DIST 0x10481000
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#define EXYNOS4_PA_COREPERI 0x10500000
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#define EXYNOS4_PA_L2CC 0x10502000
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#define EXYNOS4_PA_SROMC 0x12570000
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#define EXYNOS5_PA_SROMC 0x12250000
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#define EXYNOS4_PA_HSPHY 0x125B0000
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#define EXYNOS4_PA_UART 0x13800000
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#define EXYNOS5_PA_UART 0x12C00000
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#define EXYNOS4_PA_TIMER 0x139D0000
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#define EXYNOS5_PA_TIMER 0x12DD0000
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/* Compatibility UART */
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#define EXYNOS5440_PA_UART0 0x000B0000
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#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
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#endif /* __ASM_ARCH_MAP_H */
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