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This patch adds support to SSC (Synchronous Serial Controller) I2C driver. This IP also supports SPI protocol, but this is not the aim of this driver. This IP is embedded in all ST SoCs for Set-top box platorms, and supports I2C Standard and Fast modes. Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
42 lines
1.5 KiB
Plaintext
42 lines
1.5 KiB
Plaintext
ST SSC binding, for I2C mode operation
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Required properties :
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- compatible : Must be "st,comms-ssc-i2c" or "st,comms-ssc4-i2c"
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- reg : Offset and length of the register set for the device
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- interrupts : the interrupt specifier
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- clock-names: Must contain "ssc".
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- clocks: Must contain an entry for each name in clock-names. See the common
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clock bindings.
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- A pinctrl state named "default" must be defined to set pins in mode of
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operation for I2C transfer.
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Optional properties :
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- clock-frequency : Desired I2C bus clock frequency in Hz. If not specified,
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the default 100 kHz frequency will be used. As only Normal and Fast modes
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are supported, possible values are 100000 and 400000.
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- st,i2c-min-scl-pulse-width-us : The minimum valid SCL pulse width that is
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allowed through the deglitch circuit. In units of us.
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- st,i2c-min-sda-pulse-width-us : The minimum valid SDA pulse width that is
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allowed through the deglitch circuit. In units of us.
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- A pinctrl state named "idle" could be defined to set pins in idle state
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when I2C instance is not performing a transfer.
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- A pinctrl state named "sleep" could be defined to set pins in sleep state
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when driver enters in suspend.
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Example :
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i2c0: i2c@fed40000 {
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compatible = "st,comms-ssc4-i2c";
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reg = <0xfed40000 0x110>;
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interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&CLK_S_ICN_REG_0>;
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clock-names = "ssc";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c0_default>;
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st,i2c-min-scl-pulse-width-us = <0>;
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st,i2c-min-sda-pulse-width-us = <5>;
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};
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