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ec31abf668
There are different types of PHY from one chipset to another, while the DSI host controller is relatively consistent across platforms. Also, the PLL inside PHY is providing the source of DSI byte and pixel clocks, which are used by DSI host controller. Separated devices for clock provider and clock consumer make DSI driver better fit into common clock framework. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
165 lines
5.0 KiB
C
165 lines
5.0 KiB
C
/*
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* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __DSI_CONNECTOR_H__
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#define __DSI_CONNECTOR_H__
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include "drm_crtc.h"
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#include "drm_mipi_dsi.h"
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#include "drm_panel.h"
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#include "msm_drv.h"
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#define DSI_0 0
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#define DSI_1 1
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#define DSI_MAX 2
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#define DSI_CLOCK_MASTER DSI_0
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#define DSI_CLOCK_SLAVE DSI_1
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#define DSI_LEFT DSI_0
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#define DSI_RIGHT DSI_1
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/* According to the current drm framework sequence, take the encoder of
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* DSI_1 as master encoder
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*/
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#define DSI_ENCODER_MASTER DSI_1
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#define DSI_ENCODER_SLAVE DSI_0
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enum msm_dsi_phy_type {
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MSM_DSI_PHY_28NM_HPM,
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MSM_DSI_PHY_28NM_LP,
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MSM_DSI_PHY_MAX
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};
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#define DSI_DEV_REGULATOR_MAX 8
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/* Regulators for DSI devices */
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struct dsi_reg_entry {
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char name[32];
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int min_voltage;
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int max_voltage;
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int enable_load;
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int disable_load;
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};
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struct dsi_reg_config {
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int num;
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struct dsi_reg_entry regs[DSI_DEV_REGULATOR_MAX];
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};
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struct msm_dsi {
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struct drm_device *dev;
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struct platform_device *pdev;
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struct drm_connector *connector;
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struct drm_bridge *bridge;
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struct mipi_dsi_host *host;
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struct msm_dsi_phy *phy;
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struct drm_panel *panel;
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unsigned long panel_flags;
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struct device *phy_dev;
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bool phy_enabled;
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/* the encoders we are hooked to (outside of dsi block) */
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struct drm_encoder *encoders[MSM_DSI_ENCODER_NUM];
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int id;
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};
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/* dsi manager */
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struct drm_bridge *msm_dsi_manager_bridge_init(u8 id);
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void msm_dsi_manager_bridge_destroy(struct drm_bridge *bridge);
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struct drm_connector *msm_dsi_manager_connector_init(u8 id);
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int msm_dsi_manager_phy_enable(int id,
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const unsigned long bit_rate, const unsigned long esc_rate,
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u32 *clk_pre, u32 *clk_post);
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void msm_dsi_manager_phy_disable(int id);
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int msm_dsi_manager_cmd_xfer(int id, const struct mipi_dsi_msg *msg);
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bool msm_dsi_manager_cmd_xfer_trigger(int id, u32 iova, u32 len);
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int msm_dsi_manager_register(struct msm_dsi *msm_dsi);
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void msm_dsi_manager_unregister(struct msm_dsi *msm_dsi);
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/* msm dsi */
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struct drm_encoder *msm_dsi_get_encoder(struct msm_dsi *msm_dsi);
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/* dsi pll */
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struct msm_dsi_pll;
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#ifdef CONFIG_DRM_MSM_DSI_PLL
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struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev,
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enum msm_dsi_phy_type type, int dsi_id);
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void msm_dsi_pll_destroy(struct msm_dsi_pll *pll);
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int msm_dsi_pll_get_clk_provider(struct msm_dsi_pll *pll,
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struct clk **byte_clk_provider, struct clk **pixel_clk_provider);
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#else
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static inline struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev,
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enum msm_dsi_phy_type type, int id) {
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return ERR_PTR(-ENODEV);
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}
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static inline void msm_dsi_pll_destroy(struct msm_dsi_pll *pll)
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{
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}
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static inline int msm_dsi_pll_get_clk_provider(struct msm_dsi_pll *pll,
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struct clk **byte_clk_provider, struct clk **pixel_clk_provider)
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{
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return -ENODEV;
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}
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#endif
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/* dsi host */
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int msm_dsi_host_xfer_prepare(struct mipi_dsi_host *host,
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const struct mipi_dsi_msg *msg);
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void msm_dsi_host_xfer_restore(struct mipi_dsi_host *host,
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const struct mipi_dsi_msg *msg);
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int msm_dsi_host_cmd_tx(struct mipi_dsi_host *host,
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const struct mipi_dsi_msg *msg);
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int msm_dsi_host_cmd_rx(struct mipi_dsi_host *host,
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const struct mipi_dsi_msg *msg);
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void msm_dsi_host_cmd_xfer_commit(struct mipi_dsi_host *host,
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u32 iova, u32 len);
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int msm_dsi_host_enable(struct mipi_dsi_host *host);
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int msm_dsi_host_disable(struct mipi_dsi_host *host);
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int msm_dsi_host_power_on(struct mipi_dsi_host *host);
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int msm_dsi_host_power_off(struct mipi_dsi_host *host);
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int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host,
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struct drm_display_mode *mode);
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struct drm_panel *msm_dsi_host_get_panel(struct mipi_dsi_host *host,
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unsigned long *panel_flags);
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int msm_dsi_host_register(struct mipi_dsi_host *host, bool check_defer);
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void msm_dsi_host_unregister(struct mipi_dsi_host *host);
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int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host,
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struct msm_dsi_pll *src_pll);
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void msm_dsi_host_destroy(struct mipi_dsi_host *host);
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int msm_dsi_host_modeset_init(struct mipi_dsi_host *host,
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struct drm_device *dev);
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int msm_dsi_host_init(struct msm_dsi *msm_dsi);
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/* dsi phy */
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struct msm_dsi_phy;
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void msm_dsi_phy_driver_register(void);
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void msm_dsi_phy_driver_unregister(void);
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int msm_dsi_phy_enable(struct msm_dsi_phy *phy, bool is_dual_panel,
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const unsigned long bit_rate, const unsigned long esc_rate);
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int msm_dsi_phy_disable(struct msm_dsi_phy *phy);
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void msm_dsi_phy_get_clk_pre_post(struct msm_dsi_phy *phy,
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u32 *clk_pre, u32 *clk_post);
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struct msm_dsi_pll *msm_dsi_phy_get_pll(struct msm_dsi_phy *phy);
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#endif /* __DSI_CONNECTOR_H__ */
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