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3403b0259d
The call to pci_for_each_dma_alias() in the ITS PCI code has aroused suspicion in the past, and upon closer inspection does turn out to be completely backwards. Rather than iterating through each RID alias of the given device, what we actually want to be doing here is iterating through all the *other* devices which may also alias the same RID, in order to size the table for the worst case. Do the right thing by ignoring the initial DMA aliases themselves and just using that walk to detect an aliasing bridge, then walking back down the bus topology as necessary to actually count everything else. Our alias handling still isn't perfect, since we don't account for the cases of certain bridges only taking ownership of transactions under particular circumstances, but without completely reworking the ITS code to cope with the notion of multiple DevIDs per device, it'll have to do. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
197 lines
4.8 KiB
C
197 lines
4.8 KiB
C
/*
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* Copyright (C) 2013-2015 ARM Limited, All Rights Reserved.
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/acpi_iort.h>
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#include <linux/msi.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/of_pci.h>
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static void its_mask_msi_irq(struct irq_data *d)
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{
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pci_msi_mask_irq(d);
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irq_chip_mask_parent(d);
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}
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static void its_unmask_msi_irq(struct irq_data *d)
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{
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pci_msi_unmask_irq(d);
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irq_chip_unmask_parent(d);
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}
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static struct irq_chip its_msi_irq_chip = {
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.name = "ITS-MSI",
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.irq_unmask = its_unmask_msi_irq,
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.irq_mask = its_mask_msi_irq,
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.irq_eoi = irq_chip_eoi_parent,
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.irq_write_msi_msg = pci_msi_domain_write_msg,
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};
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static int its_pci_msi_vec_count(struct pci_dev *pdev, void *data)
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{
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int msi, msix, *count = data;
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msi = max(pci_msi_vec_count(pdev), 0);
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msix = max(pci_msix_vec_count(pdev), 0);
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*count += max(msi, msix);
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return 0;
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}
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static int its_get_pci_alias(struct pci_dev *pdev, u16 alias, void *data)
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{
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struct pci_dev **alias_dev = data;
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*alias_dev = pdev;
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return 0;
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}
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static int its_pci_msi_prepare(struct irq_domain *domain, struct device *dev,
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int nvec, msi_alloc_info_t *info)
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{
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struct pci_dev *pdev, *alias_dev;
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struct msi_domain_info *msi_info;
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int alias_count = 0;
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if (!dev_is_pci(dev))
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return -EINVAL;
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msi_info = msi_get_domain_info(domain->parent);
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pdev = to_pci_dev(dev);
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/*
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* If pdev is downstream of any aliasing bridges, take an upper
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* bound of how many other vectors could map to the same DevID.
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*/
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pci_for_each_dma_alias(pdev, its_get_pci_alias, &alias_dev);
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if (alias_dev != pdev && alias_dev->subordinate)
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pci_walk_bus(alias_dev->subordinate, its_pci_msi_vec_count,
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&alias_count);
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/* ITS specific DeviceID, as the core ITS ignores dev. */
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info->scratchpad[0].ul = pci_msi_domain_get_msi_rid(domain, pdev);
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return msi_info->ops->msi_prepare(domain->parent,
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dev, max(nvec, alias_count), info);
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}
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static struct msi_domain_ops its_pci_msi_ops = {
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.msi_prepare = its_pci_msi_prepare,
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};
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static struct msi_domain_info its_pci_msi_domain_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX),
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.ops = &its_pci_msi_ops,
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.chip = &its_msi_irq_chip,
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};
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static struct of_device_id its_device_id[] = {
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{ .compatible = "arm,gic-v3-its", },
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{},
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};
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static int __init its_pci_msi_init_one(struct fwnode_handle *handle,
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const char *name)
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{
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struct irq_domain *parent;
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parent = irq_find_matching_fwnode(handle, DOMAIN_BUS_NEXUS);
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if (!parent || !msi_get_domain_info(parent)) {
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pr_err("%s: Unable to locate ITS domain\n", name);
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return -ENXIO;
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}
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if (!pci_msi_create_irq_domain(handle, &its_pci_msi_domain_info,
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parent)) {
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pr_err("%s: Unable to create PCI domain\n", name);
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return -ENOMEM;
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}
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return 0;
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}
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static int __init its_pci_of_msi_init(void)
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{
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struct device_node *np;
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for (np = of_find_matching_node(NULL, its_device_id); np;
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np = of_find_matching_node(np, its_device_id)) {
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if (!of_property_read_bool(np, "msi-controller"))
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continue;
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if (its_pci_msi_init_one(of_node_to_fwnode(np), np->full_name))
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continue;
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pr_info("PCI/MSI: %s domain created\n", np->full_name);
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}
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return 0;
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}
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#ifdef CONFIG_ACPI
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static int __init
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its_pci_msi_parse_madt(struct acpi_subtable_header *header,
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const unsigned long end)
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{
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struct acpi_madt_generic_translator *its_entry;
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struct fwnode_handle *dom_handle;
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const char *node_name;
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int err = -ENXIO;
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its_entry = (struct acpi_madt_generic_translator *)header;
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node_name = kasprintf(GFP_KERNEL, "ITS@0x%lx",
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(long)its_entry->base_address);
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dom_handle = iort_find_domain_token(its_entry->translation_id);
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if (!dom_handle) {
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pr_err("%s: Unable to locate ITS domain handle\n", node_name);
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goto out;
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}
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err = its_pci_msi_init_one(dom_handle, node_name);
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if (!err)
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pr_info("PCI/MSI: %s domain created\n", node_name);
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out:
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kfree(node_name);
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return err;
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}
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static int __init its_pci_acpi_msi_init(void)
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{
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acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR,
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its_pci_msi_parse_madt, 0);
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return 0;
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}
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#else
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static int __init its_pci_acpi_msi_init(void)
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{
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return 0;
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}
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#endif
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static int __init its_pci_msi_init(void)
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{
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its_pci_of_msi_init();
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its_pci_acpi_msi_init();
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return 0;
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}
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early_initcall(its_pci_msi_init);
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