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f363c407b4
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
41 lines
1.1 KiB
ArmAsm
41 lines
1.1 KiB
ArmAsm
/*
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* reset AT91SAM9G20 as per errata
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*
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* (C) BitBox Ltd 2010
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*
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* unless the SDRAM is cleanly shutdown before we hit the
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* reset register it can be left driving the data bus and
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* killing the chance of a subsequent boot from NAND
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/linkage.h>
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#include <mach/hardware.h>
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#include <mach/at91_ramc.h>
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#include <mach/at91_rstc.h>
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.arm
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.globl at91sam9_alt_restart
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at91sam9_alt_restart: ldr r0, =at91_ramc_base @ preload constants
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ldr r0, [r0]
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ldr r4, =at91_rstc_base
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ldr r1, [r4]
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mov r2, #1
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mov r3, #AT91_SDRAMC_LPCB_POWER_DOWN
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ldr r4, =AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST
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.balign 32 @ align to cache line
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str r2, [r0, #AT91_SDRAMC_TR] @ disable SDRAM access
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str r3, [r0, #AT91_SDRAMC_LPR] @ power down SDRAM
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str r4, [r1, #AT91_RSTC_CR] @ reset processor
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b .
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