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f5ac3c49ff
Device 'new_id' interface is useful for testing of not yet published hardware on older kernels and for internally used device ids on simulation platforms. However currently with the device configuration held in device_id driver data as a pointer to mei_cfg structure it is hard, as one need to locate the address of the correct structure. A recommended way of doing that is to use and index instead of a pointer. This patch adds a new list of configuration mei_cfg_list[] indexed via enum mei_cfg_idx. In addition it cleanups ich platform naming, renames legacy generation to ich and what was ich to ich10. Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
106 lines
2.9 KiB
C
106 lines
2.9 KiB
C
/*
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*
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* Intel Management Engine Interface (Intel MEI) Linux driver
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* Copyright (c) 2003-2012, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*/
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#ifndef _MEI_INTERFACE_H_
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#define _MEI_INTERFACE_H_
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#include <linux/irqreturn.h>
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#include <linux/pci.h>
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#include <linux/mei.h>
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#include "mei_dev.h"
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#include "client.h"
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/*
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* mei_cfg - mei device configuration
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*
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* @fw_status: FW status
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* @quirk_probe: device exclusion quirk
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*/
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struct mei_cfg {
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const struct mei_fw_status fw_status;
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bool (*quirk_probe)(struct pci_dev *pdev);
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};
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#define MEI_PCI_DEVICE(dev, cfg) \
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.vendor = PCI_VENDOR_ID_INTEL, .device = (dev), \
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.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \
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.driver_data = (kernel_ulong_t)(cfg),
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#define MEI_ME_RPM_TIMEOUT 500 /* ms */
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/**
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* struct mei_me_hw - me hw specific data
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*
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* @cfg: per device generation config and ops
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* @mem_addr: io memory address
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* @pg_state: power gating state
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* @d0i3_supported: di03 support
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*/
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struct mei_me_hw {
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const struct mei_cfg *cfg;
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void __iomem *mem_addr;
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enum mei_pg_state pg_state;
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bool d0i3_supported;
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};
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#define to_me_hw(dev) (struct mei_me_hw *)((dev)->hw)
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/**
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* enum mei_cfg_idx - indices to platform specific configurations.
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*
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* Note: has to be synchronized with mei_cfg_list[]
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*
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* @MEI_ME_UNDEF_CFG: Lower sentinel.
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* @MEI_ME_ICH_CFG: I/O Controller Hub legacy devices.
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* @MEI_ME_ICH10_CFG: I/O Controller Hub platforms Gen10
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* @MEI_ME_PCH_CFG: Platform Controller Hub platforms (Up to Gen8).
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* @MEI_ME_PCH_CPT_PBG_CFG:Platform Controller Hub workstations
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* with quirk for Node Manager exclusion.
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* @MEI_ME_PCH8_CFG: Platform Controller Hub Gen8 and newer
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* client platforms.
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* @MEI_ME_PCH8_SPS_CFG: Platform Controller Hub Gen8 and newer
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* servers platforms with quirk for
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* SPS firmware exclusion.
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* @MEI_ME_NUM_CFG: Upper Sentinel.
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*/
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enum mei_cfg_idx {
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MEI_ME_UNDEF_CFG,
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MEI_ME_ICH_CFG,
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MEI_ME_ICH10_CFG,
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MEI_ME_PCH_CFG,
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MEI_ME_PCH_CPT_PBG_CFG,
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MEI_ME_PCH8_CFG,
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MEI_ME_PCH8_SPS_CFG,
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MEI_ME_NUM_CFG,
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};
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const struct mei_cfg *mei_me_get_cfg(kernel_ulong_t idx);
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struct mei_device *mei_me_dev_init(struct pci_dev *pdev,
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const struct mei_cfg *cfg);
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int mei_me_pg_enter_sync(struct mei_device *dev);
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int mei_me_pg_exit_sync(struct mei_device *dev);
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irqreturn_t mei_me_irq_quick_handler(int irq, void *dev_id);
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irqreturn_t mei_me_irq_thread_handler(int irq, void *dev_id);
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#endif /* _MEI_INTERFACE_H_ */
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