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029cfd6b74
libata lets low level drivers build ata_port_operations table and register it with libata core layer. This allows low level drivers high level of flexibility but also burdens them with lots of boilerplate entries. This becomes worse for drivers which support related similar controllers which differ slightly. They share most of the operations except for a few. However, the driver still needs to list all operations for each variant. This results in large number of duplicate entries, which is not only inefficient but also error-prone as it becomes very difficult to tell what the actual differences are. This duplicate boilerplates all over the low level drivers also make updating the core layer exteremely difficult and error-prone. When compounded with multi-branched development model, it ends up accumulating inconsistencies over time. Some of those inconsistencies cause immediate problems and fixed. Others just remain there dormant making maintenance increasingly difficult. To rectify the problem, this patch implements ata_port_operations inheritance. To allow LLDs to easily re-use their own ops tables overriding only specific methods, this patch implements poor man's class inheritance. An ops table has ->inherits field which can be set to any ops table as long as it doesn't create a loop. When the host is started, the inheritance chain is followed and any operation which isn't specified is taken from the nearest ancestor which has it specified. This operation is called finalization and done only once per an ops table and the LLD doesn't have to do anything special about it other than making the ops table non-const such that libata can update it. libata provides four base ops tables lower drivers can inherit from - base, sata, pmp, sff and bmdma. To avoid overriding these ops accidentaly, these ops are declared const and LLDs should always inherit these instead of using them directly. After finalization, all the ops table are identical before and after the patch except for setting .irq_handler to ata_interrupt in drivers which didn't use to. The .irq_handler doesn't have any actual effect and the field will soon be removed by later patch. * sata_sx4 is still using old style EH and currently doesn't take advantage of ops inheritance. Signed-off-by: Tejun Heo <htejun@gmail.com>
261 lines
6.4 KiB
C
261 lines
6.4 KiB
C
/*
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* pata_hpt3x3 - HPT3x3 driver
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* (c) Copyright 2005-2006 Red Hat
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*
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* Was pata_hpt34x but the naming was confusing as it supported the
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* 343 and 363 so it has been renamed.
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*
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* Based on:
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* linux/drivers/ide/pci/hpt34x.c Version 0.40 Sept 10, 2002
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* Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
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*
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* May be copied or modified under the terms of the GNU General Public
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* License
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#define DRV_NAME "pata_hpt3x3"
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#define DRV_VERSION "0.5.3"
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/**
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* hpt3x3_set_piomode - PIO setup
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* @ap: ATA interface
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* @adev: device on the interface
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*
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* Set our PIO requirements. This is fairly simple on the HPT3x3 as
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* all we have to do is clear the MWDMA and UDMA bits then load the
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* mode number.
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*/
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static void hpt3x3_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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u32 r1, r2;
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int dn = 2 * ap->port_no + adev->devno;
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pci_read_config_dword(pdev, 0x44, &r1);
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pci_read_config_dword(pdev, 0x48, &r2);
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/* Load the PIO timing number */
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r1 &= ~(7 << (3 * dn));
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r1 |= (adev->pio_mode - XFER_PIO_0) << (3 * dn);
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r2 &= ~(0x11 << dn); /* Clear MWDMA and UDMA bits */
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pci_write_config_dword(pdev, 0x44, r1);
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pci_write_config_dword(pdev, 0x48, r2);
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}
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#if defined(CONFIG_PATA_HPT3X3_DMA)
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/**
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* hpt3x3_set_dmamode - DMA timing setup
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* @ap: ATA interface
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* @adev: Device being configured
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*
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* Set up the channel for MWDMA or UDMA modes. Much the same as with
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* PIO, load the mode number and then set MWDMA or UDMA flag.
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*
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* 0x44 : bit 0-2 master mode, 3-5 slave mode, etc
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* 0x48 : bit 4/0 DMA/UDMA bit 5/1 for slave etc
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*/
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static void hpt3x3_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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u32 r1, r2;
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int dn = 2 * ap->port_no + adev->devno;
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int mode_num = adev->dma_mode & 0x0F;
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pci_read_config_dword(pdev, 0x44, &r1);
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pci_read_config_dword(pdev, 0x48, &r2);
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/* Load the timing number */
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r1 &= ~(7 << (3 * dn));
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r1 |= (mode_num << (3 * dn));
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r2 &= ~(0x11 << dn); /* Clear MWDMA and UDMA bits */
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if (adev->dma_mode >= XFER_UDMA_0)
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r2 |= (0x10 << dn); /* Ultra mode */
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else
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r2 |= (0x01 << dn); /* MWDMA */
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pci_write_config_dword(pdev, 0x44, r1);
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pci_write_config_dword(pdev, 0x48, r2);
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}
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#endif /* CONFIG_PATA_HPT3X3_DMA */
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/**
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* hpt3x3_atapi_dma - ATAPI DMA check
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* @qc: Queued command
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*
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* Just say no - we don't do ATAPI DMA
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*/
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static int hpt3x3_atapi_dma(struct ata_queued_cmd *qc)
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{
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return 1;
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}
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static struct scsi_host_template hpt3x3_sht = {
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ATA_BMDMA_SHT(DRV_NAME),
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};
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static struct ata_port_operations hpt3x3_port_ops = {
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.inherits = &ata_bmdma_port_ops,
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.check_atapi_dma= hpt3x3_atapi_dma,
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.cable_detect = ata_cable_40wire,
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.set_piomode = hpt3x3_set_piomode,
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#if defined(CONFIG_PATA_HPT3X3_DMA)
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.set_dmamode = hpt3x3_set_dmamode,
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#endif
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};
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/**
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* hpt3x3_init_chipset - chip setup
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* @dev: PCI device
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*
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* Perform the setup required at boot and on resume.
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*/
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static void hpt3x3_init_chipset(struct pci_dev *dev)
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{
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u16 cmd;
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/* Initialize the board */
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pci_write_config_word(dev, 0x80, 0x00);
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/* Check if it is a 343 or a 363. 363 has COMMAND_MEMORY set */
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pci_read_config_word(dev, PCI_COMMAND, &cmd);
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if (cmd & PCI_COMMAND_MEMORY)
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pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF0);
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else
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pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x20);
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}
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/**
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* hpt3x3_init_one - Initialise an HPT343/363
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* @pdev: PCI device
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* @id: Entry in match table
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*
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* Perform basic initialisation. We set the device up so we access all
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* ports via BAR4. This is neccessary to work around errata.
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*/
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static int hpt3x3_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
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{
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static int printed_version;
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static const struct ata_port_info info = {
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.flags = ATA_FLAG_SLAVE_POSS,
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.pio_mask = 0x1f,
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#if defined(CONFIG_PATA_HPT3X3_DMA)
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/* Further debug needed */
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.mwdma_mask = 0x07,
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.udma_mask = 0x07,
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#endif
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.port_ops = &hpt3x3_port_ops
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};
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/* Register offsets of taskfiles in BAR4 area */
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static const u8 offset_cmd[2] = { 0x20, 0x28 };
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static const u8 offset_ctl[2] = { 0x36, 0x3E };
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const struct ata_port_info *ppi[] = { &info, NULL };
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struct ata_host *host;
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int i, rc;
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void __iomem *base;
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hpt3x3_init_chipset(pdev);
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if (!printed_version++)
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dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
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host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
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if (!host)
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return -ENOMEM;
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/* acquire resources and fill host */
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rc = pcim_enable_device(pdev);
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if (rc)
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return rc;
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/* Everything is relative to BAR4 if we set up this way */
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rc = pcim_iomap_regions(pdev, 1 << 4, DRV_NAME);
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if (rc == -EBUSY)
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pcim_pin_device(pdev);
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if (rc)
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return rc;
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host->iomap = pcim_iomap_table(pdev);
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rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
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if (rc)
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return rc;
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rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
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if (rc)
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return rc;
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base = host->iomap[4]; /* Bus mastering base */
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for (i = 0; i < host->n_ports; i++) {
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struct ata_port *ap = host->ports[i];
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struct ata_ioports *ioaddr = &ap->ioaddr;
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ioaddr->cmd_addr = base + offset_cmd[i];
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ioaddr->altstatus_addr =
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ioaddr->ctl_addr = base + offset_ctl[i];
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ioaddr->scr_addr = NULL;
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ata_std_ports(ioaddr);
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ioaddr->bmdma_addr = base + 8 * i;
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ata_port_pbar_desc(ap, 4, -1, "ioport");
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ata_port_pbar_desc(ap, 4, offset_cmd[i], "cmd");
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}
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pci_set_master(pdev);
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return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED,
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&hpt3x3_sht);
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}
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#ifdef CONFIG_PM
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static int hpt3x3_reinit_one(struct pci_dev *dev)
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{
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hpt3x3_init_chipset(dev);
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return ata_pci_device_resume(dev);
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}
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#endif
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static const struct pci_device_id hpt3x3[] = {
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{ PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT343), },
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{ },
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};
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static struct pci_driver hpt3x3_pci_driver = {
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.name = DRV_NAME,
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.id_table = hpt3x3,
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.probe = hpt3x3_init_one,
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.remove = ata_pci_remove_one,
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#ifdef CONFIG_PM
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.suspend = ata_pci_device_suspend,
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.resume = hpt3x3_reinit_one,
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#endif
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};
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static int __init hpt3x3_init(void)
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{
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return pci_register_driver(&hpt3x3_pci_driver);
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}
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static void __exit hpt3x3_exit(void)
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{
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pci_unregister_driver(&hpt3x3_pci_driver);
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}
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MODULE_AUTHOR("Alan Cox");
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MODULE_DESCRIPTION("low-level driver for the Highpoint HPT343/363");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(pci, hpt3x3);
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MODULE_VERSION(DRV_VERSION);
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module_init(hpt3x3_init);
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module_exit(hpt3x3_exit);
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