mirror of
https://github.com/edk2-porting/linux-next.git
synced 2025-01-22 12:33:59 +08:00
26fce0557f
Right now the only user of reset-imx7 is pci-imx6 and the reset_control_assert and deassert calls on pciephy_reset don't toggle the PCIEPHY_BTN and PCIEPHY_G_RST bits as expected. Fix this by writing 1 or 0 respectively. The reference manual is not very clear regarding SRC_PCIEPHY_RCR but for other registers like MIPIPHY and HSICPHY the bits are explicitly documented as "1 means assert, 0 means deassert". The values are still reversed for IMX7_RESET_PCIE_CTRL_APPS_EN. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
||
|---|---|---|
| .. | ||
| hisilicon | ||
| sti | ||
| tegra | ||
| core.c | ||
| Kconfig | ||
| Makefile | ||
| reset-a10sr.c | ||
| reset-ath79.c | ||
| reset-axs10x.c | ||
| reset-berlin.c | ||
| reset-hsdk.c | ||
| reset-imx7.c | ||
| reset-lantiq.c | ||
| reset-lpc18xx.c | ||
| reset-meson.c | ||
| reset-oxnas.c | ||
| reset-pistachio.c | ||
| reset-simple.c | ||
| reset-simple.h | ||
| reset-stm32mp1.c | ||
| reset-sunxi.c | ||
| reset-ti-sci.c | ||
| reset-ti-syscon.c | ||
| reset-uniphier.c | ||
| reset-zynq.c | ||