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26c191788f
When holding the mmap_sem for reading, pmd_offset_map_lock should only run on a pmd_t that has been read atomically from the pmdp pointer, otherwise we may read only half of it leading to this crash. PID: 11679 TASK: f06e8000 CPU: 3 COMMAND: "do_race_2_panic" #0 [f06a9dd8] crash_kexec at c049b5ec #1 [f06a9e2c] oops_end at c083d1c2 #2 [f06a9e40] no_context at c0433ded #3 [f06a9e64] bad_area_nosemaphore at c043401a #4 [f06a9e6c] __do_page_fault at c0434493 #5 [f06a9eec] do_page_fault at c083eb45 #6 [f06a9f04] error_code (via page_fault) at c083c5d5 EAX: 01fb470c EBX: fff35000 ECX: 00000003 EDX: 00000100 EBP: 00000000 DS: 007b ESI: 9e201000 ES: 007b EDI: 01fb4700 GS: 00e0 CS: 0060 EIP: c083bc14 ERR: ffffffff EFLAGS: 00010246 #7 [f06a9f38] _spin_lock at c083bc14 #8 [f06a9f44] sys_mincore at c0507b7d #9 [f06a9fb0] system_call at c083becd start len EAX: ffffffda EBX: 9e200000 ECX: 00001000 EDX: 6228537f DS: 007b ESI: 00000000 ES: 007b EDI: 003d0f00 SS: 007b ESP: 62285354 EBP: 62285388 GS: 0033 CS: 0073 EIP: 00291416 ERR: 000000da EFLAGS: 00000286 This should be a longstanding bug affecting x86 32bit PAE without THP. Only archs with 64bit large pmd_t and 32bit unsigned long should be affected. With THP enabled the barrier() in pmd_none_or_trans_huge_or_clear_bad() would partly hide the bug when the pmd transition from none to stable, by forcing a re-read of the *pmd in pmd_offset_map_lock, but when THP is enabled a new set of problem arises by the fact could then transition freely in any of the none, pmd_trans_huge or pmd_trans_stable states. So making the barrier in pmd_none_or_trans_huge_or_clear_bad() unconditional isn't good idea and it would be a flakey solution. This should be fully fixed by introducing a pmd_read_atomic that reads the pmd in order with THP disabled, or by reading the pmd atomically with cmpxchg8b with THP enabled. Luckily this new race condition only triggers in the places that must already be covered by pmd_none_or_trans_huge_or_clear_bad() so the fix is localized there but this bug is not related to THP. NOTE: this can trigger on x86 32bit systems with PAE enabled with more than 4G of ram, otherwise the high part of the pmd will never risk to be truncated because it would be zero at all times, in turn so hiding the SMP race. This bug was discovered and fully debugged by Ulrich, quote: ---- [..] pmd_none_or_trans_huge_or_clear_bad() loads the content of edx and eax. 496 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd) 497 { 498 /* depend on compiler for an atomic pmd read */ 499 pmd_t pmdval = *pmd; // edi = pmd pointer 0xc0507a74 <sys_mincore+548>: mov 0x8(%esp),%edi ... // edx = PTE page table high address 0xc0507a84 <sys_mincore+564>: mov 0x4(%edi),%edx ... // eax = PTE page table low address 0xc0507a8e <sys_mincore+574>: mov (%edi),%eax [..] Please note that the PMD is not read atomically. These are two "mov" instructions where the high order bits of the PMD entry are fetched first. Hence, the above machine code is prone to the following race. - The PMD entry {high|low} is 0x0000000000000000. The "mov" at 0xc0507a84 loads 0x00000000 into edx. - A page fault (on another CPU) sneaks in between the two "mov" instructions and instantiates the PMD. - The PMD entry {high|low} is now 0x00000003fda38067. The "mov" at 0xc0507a8e loads 0xfda38067 into eax. ---- Reported-by: Ulrich Obergfell <uobergfe@redhat.com> Signed-off-by: Andrea Arcangeli <aarcange@redhat.com> Cc: Mel Gorman <mgorman@suse.de> Cc: Hugh Dickins <hughd@google.com> Cc: Larry Woodman <lwoodman@redhat.com> Cc: Petr Matousek <pmatouse@redhat.com> Cc: Rik van Riel <riel@redhat.com> Cc: <stable@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
528 lines
15 KiB
C
528 lines
15 KiB
C
#ifndef _ASM_GENERIC_PGTABLE_H
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#define _ASM_GENERIC_PGTABLE_H
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#ifndef __ASSEMBLY__
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#ifdef CONFIG_MMU
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#include <linux/mm_types.h>
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#include <linux/bug.h>
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#ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
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extern int ptep_set_access_flags(struct vm_area_struct *vma,
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unsigned long address, pte_t *ptep,
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pte_t entry, int dirty);
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#endif
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#ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
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extern int pmdp_set_access_flags(struct vm_area_struct *vma,
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unsigned long address, pmd_t *pmdp,
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pmd_t entry, int dirty);
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#endif
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#ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
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static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
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unsigned long address,
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pte_t *ptep)
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{
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pte_t pte = *ptep;
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int r = 1;
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if (!pte_young(pte))
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r = 0;
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else
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set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
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return r;
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}
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#endif
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#ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
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#ifdef CONFIG_TRANSPARENT_HUGEPAGE
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static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
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unsigned long address,
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pmd_t *pmdp)
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{
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pmd_t pmd = *pmdp;
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int r = 1;
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if (!pmd_young(pmd))
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r = 0;
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else
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set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
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return r;
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}
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#else /* CONFIG_TRANSPARENT_HUGEPAGE */
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static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
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unsigned long address,
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pmd_t *pmdp)
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{
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BUG();
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return 0;
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}
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#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
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#endif
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#ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
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int ptep_clear_flush_young(struct vm_area_struct *vma,
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unsigned long address, pte_t *ptep);
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#endif
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#ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
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int pmdp_clear_flush_young(struct vm_area_struct *vma,
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unsigned long address, pmd_t *pmdp);
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#endif
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#ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
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static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
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unsigned long address,
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pte_t *ptep)
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{
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pte_t pte = *ptep;
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pte_clear(mm, address, ptep);
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return pte;
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}
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#endif
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#ifndef __HAVE_ARCH_PMDP_GET_AND_CLEAR
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#ifdef CONFIG_TRANSPARENT_HUGEPAGE
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static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
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unsigned long address,
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pmd_t *pmdp)
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{
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pmd_t pmd = *pmdp;
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pmd_clear(mm, address, pmdp);
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return pmd;
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}
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#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
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#endif
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#ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
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static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
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unsigned long address, pte_t *ptep,
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int full)
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{
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pte_t pte;
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pte = ptep_get_and_clear(mm, address, ptep);
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return pte;
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}
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#endif
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/*
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* Some architectures may be able to avoid expensive synchronization
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* primitives when modifications are made to PTE's which are already
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* not present, or in the process of an address space destruction.
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*/
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#ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
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static inline void pte_clear_not_present_full(struct mm_struct *mm,
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unsigned long address,
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pte_t *ptep,
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int full)
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{
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pte_clear(mm, address, ptep);
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}
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#endif
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#ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
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extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
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unsigned long address,
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pte_t *ptep);
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#endif
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#ifndef __HAVE_ARCH_PMDP_CLEAR_FLUSH
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extern pmd_t pmdp_clear_flush(struct vm_area_struct *vma,
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unsigned long address,
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pmd_t *pmdp);
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#endif
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#ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
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struct mm_struct;
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static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
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{
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pte_t old_pte = *ptep;
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set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
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}
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#endif
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#ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
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#ifdef CONFIG_TRANSPARENT_HUGEPAGE
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static inline void pmdp_set_wrprotect(struct mm_struct *mm,
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unsigned long address, pmd_t *pmdp)
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{
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pmd_t old_pmd = *pmdp;
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set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
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}
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#else /* CONFIG_TRANSPARENT_HUGEPAGE */
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static inline void pmdp_set_wrprotect(struct mm_struct *mm,
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unsigned long address, pmd_t *pmdp)
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{
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BUG();
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}
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#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
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#endif
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#ifndef __HAVE_ARCH_PMDP_SPLITTING_FLUSH
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extern void pmdp_splitting_flush(struct vm_area_struct *vma,
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unsigned long address, pmd_t *pmdp);
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#endif
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#ifndef __HAVE_ARCH_PTE_SAME
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static inline int pte_same(pte_t pte_a, pte_t pte_b)
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{
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return pte_val(pte_a) == pte_val(pte_b);
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}
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#endif
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#ifndef __HAVE_ARCH_PMD_SAME
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#ifdef CONFIG_TRANSPARENT_HUGEPAGE
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static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
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{
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return pmd_val(pmd_a) == pmd_val(pmd_b);
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}
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#else /* CONFIG_TRANSPARENT_HUGEPAGE */
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static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
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{
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BUG();
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return 0;
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}
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#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
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#endif
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#ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_DIRTY
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#define page_test_and_clear_dirty(pfn, mapped) (0)
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#endif
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#ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_DIRTY
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#define pte_maybe_dirty(pte) pte_dirty(pte)
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#else
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#define pte_maybe_dirty(pte) (1)
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#endif
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#ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG
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#define page_test_and_clear_young(pfn) (0)
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#endif
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#ifndef __HAVE_ARCH_PGD_OFFSET_GATE
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#define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
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#endif
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#ifndef __HAVE_ARCH_MOVE_PTE
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#define move_pte(pte, prot, old_addr, new_addr) (pte)
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#endif
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#ifndef flush_tlb_fix_spurious_fault
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#define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
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#endif
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#ifndef pgprot_noncached
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#define pgprot_noncached(prot) (prot)
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#endif
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#ifndef pgprot_writecombine
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#define pgprot_writecombine pgprot_noncached
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#endif
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/*
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* When walking page tables, get the address of the next boundary,
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* or the end address of the range if that comes earlier. Although no
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* vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
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*/
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#define pgd_addr_end(addr, end) \
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({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
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(__boundary - 1 < (end) - 1)? __boundary: (end); \
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})
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#ifndef pud_addr_end
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#define pud_addr_end(addr, end) \
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({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
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(__boundary - 1 < (end) - 1)? __boundary: (end); \
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})
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#endif
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#ifndef pmd_addr_end
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#define pmd_addr_end(addr, end) \
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({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
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(__boundary - 1 < (end) - 1)? __boundary: (end); \
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})
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#endif
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/*
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* When walking page tables, we usually want to skip any p?d_none entries;
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* and any p?d_bad entries - reporting the error before resetting to none.
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* Do the tests inline, but report and clear the bad entry in mm/memory.c.
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*/
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void pgd_clear_bad(pgd_t *);
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void pud_clear_bad(pud_t *);
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void pmd_clear_bad(pmd_t *);
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static inline int pgd_none_or_clear_bad(pgd_t *pgd)
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{
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if (pgd_none(*pgd))
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return 1;
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if (unlikely(pgd_bad(*pgd))) {
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pgd_clear_bad(pgd);
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return 1;
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}
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return 0;
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}
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static inline int pud_none_or_clear_bad(pud_t *pud)
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{
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if (pud_none(*pud))
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return 1;
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if (unlikely(pud_bad(*pud))) {
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pud_clear_bad(pud);
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return 1;
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}
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return 0;
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}
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static inline int pmd_none_or_clear_bad(pmd_t *pmd)
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{
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if (pmd_none(*pmd))
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return 1;
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if (unlikely(pmd_bad(*pmd))) {
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pmd_clear_bad(pmd);
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return 1;
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}
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return 0;
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}
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static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm,
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unsigned long addr,
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pte_t *ptep)
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{
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/*
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* Get the current pte state, but zero it out to make it
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* non-present, preventing the hardware from asynchronously
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* updating it.
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*/
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return ptep_get_and_clear(mm, addr, ptep);
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}
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static inline void __ptep_modify_prot_commit(struct mm_struct *mm,
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unsigned long addr,
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pte_t *ptep, pte_t pte)
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{
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/*
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* The pte is non-present, so there's no hardware state to
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* preserve.
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*/
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set_pte_at(mm, addr, ptep, pte);
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}
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#ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
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/*
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* Start a pte protection read-modify-write transaction, which
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* protects against asynchronous hardware modifications to the pte.
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* The intention is not to prevent the hardware from making pte
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* updates, but to prevent any updates it may make from being lost.
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*
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* This does not protect against other software modifications of the
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* pte; the appropriate pte lock must be held over the transation.
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*
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* Note that this interface is intended to be batchable, meaning that
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* ptep_modify_prot_commit may not actually update the pte, but merely
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* queue the update to be done at some later time. The update must be
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* actually committed before the pte lock is released, however.
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*/
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static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
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unsigned long addr,
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pte_t *ptep)
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{
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return __ptep_modify_prot_start(mm, addr, ptep);
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}
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/*
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* Commit an update to a pte, leaving any hardware-controlled bits in
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* the PTE unmodified.
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*/
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static inline void ptep_modify_prot_commit(struct mm_struct *mm,
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unsigned long addr,
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pte_t *ptep, pte_t pte)
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{
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__ptep_modify_prot_commit(mm, addr, ptep, pte);
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}
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#endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
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#endif /* CONFIG_MMU */
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/*
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* A facility to provide lazy MMU batching. This allows PTE updates and
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* page invalidations to be delayed until a call to leave lazy MMU mode
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* is issued. Some architectures may benefit from doing this, and it is
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* beneficial for both shadow and direct mode hypervisors, which may batch
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* the PTE updates which happen during this window. Note that using this
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* interface requires that read hazards be removed from the code. A read
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* hazard could result in the direct mode hypervisor case, since the actual
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* write to the page tables may not yet have taken place, so reads though
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* a raw PTE pointer after it has been modified are not guaranteed to be
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* up to date. This mode can only be entered and left under the protection of
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* the page table locks for all page tables which may be modified. In the UP
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* case, this is required so that preemption is disabled, and in the SMP case,
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* it must synchronize the delayed page table writes properly on other CPUs.
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*/
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#ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
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#define arch_enter_lazy_mmu_mode() do {} while (0)
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#define arch_leave_lazy_mmu_mode() do {} while (0)
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#define arch_flush_lazy_mmu_mode() do {} while (0)
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#endif
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/*
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* A facility to provide batching of the reload of page tables and
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* other process state with the actual context switch code for
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* paravirtualized guests. By convention, only one of the batched
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* update (lazy) modes (CPU, MMU) should be active at any given time,
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* entry should never be nested, and entry and exits should always be
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* paired. This is for sanity of maintaining and reasoning about the
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* kernel code. In this case, the exit (end of the context switch) is
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* in architecture-specific code, and so doesn't need a generic
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* definition.
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*/
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#ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
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#define arch_start_context_switch(prev) do {} while (0)
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#endif
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#ifndef __HAVE_PFNMAP_TRACKING
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/*
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* Interface that can be used by architecture code to keep track of
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* memory type of pfn mappings (remap_pfn_range, vm_insert_pfn)
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*
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* track_pfn_vma_new is called when a _new_ pfn mapping is being established
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* for physical range indicated by pfn and size.
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*/
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static inline int track_pfn_vma_new(struct vm_area_struct *vma, pgprot_t *prot,
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unsigned long pfn, unsigned long size)
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{
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return 0;
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}
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/*
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* Interface that can be used by architecture code to keep track of
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* memory type of pfn mappings (remap_pfn_range, vm_insert_pfn)
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*
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* track_pfn_vma_copy is called when vma that is covering the pfnmap gets
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* copied through copy_page_range().
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*/
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static inline int track_pfn_vma_copy(struct vm_area_struct *vma)
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{
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return 0;
|
|
}
|
|
|
|
/*
|
|
* Interface that can be used by architecture code to keep track of
|
|
* memory type of pfn mappings (remap_pfn_range, vm_insert_pfn)
|
|
*
|
|
* untrack_pfn_vma is called while unmapping a pfnmap for a region.
|
|
* untrack can be called for a specific region indicated by pfn and size or
|
|
* can be for the entire vma (in which case size can be zero).
|
|
*/
|
|
static inline void untrack_pfn_vma(struct vm_area_struct *vma,
|
|
unsigned long pfn, unsigned long size)
|
|
{
|
|
}
|
|
#else
|
|
extern int track_pfn_vma_new(struct vm_area_struct *vma, pgprot_t *prot,
|
|
unsigned long pfn, unsigned long size);
|
|
extern int track_pfn_vma_copy(struct vm_area_struct *vma);
|
|
extern void untrack_pfn_vma(struct vm_area_struct *vma, unsigned long pfn,
|
|
unsigned long size);
|
|
#endif
|
|
|
|
#ifdef CONFIG_MMU
|
|
|
|
#ifndef CONFIG_TRANSPARENT_HUGEPAGE
|
|
static inline int pmd_trans_huge(pmd_t pmd)
|
|
{
|
|
return 0;
|
|
}
|
|
static inline int pmd_trans_splitting(pmd_t pmd)
|
|
{
|
|
return 0;
|
|
}
|
|
#ifndef __HAVE_ARCH_PMD_WRITE
|
|
static inline int pmd_write(pmd_t pmd)
|
|
{
|
|
BUG();
|
|
return 0;
|
|
}
|
|
#endif /* __HAVE_ARCH_PMD_WRITE */
|
|
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
|
|
|
|
#ifndef pmd_read_atomic
|
|
static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
|
|
{
|
|
/*
|
|
* Depend on compiler for an atomic pmd read. NOTE: this is
|
|
* only going to work, if the pmdval_t isn't larger than
|
|
* an unsigned long.
|
|
*/
|
|
return *pmdp;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* This function is meant to be used by sites walking pagetables with
|
|
* the mmap_sem hold in read mode to protect against MADV_DONTNEED and
|
|
* transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
|
|
* into a null pmd and the transhuge page fault can convert a null pmd
|
|
* into an hugepmd or into a regular pmd (if the hugepage allocation
|
|
* fails). While holding the mmap_sem in read mode the pmd becomes
|
|
* stable and stops changing under us only if it's not null and not a
|
|
* transhuge pmd. When those races occurs and this function makes a
|
|
* difference vs the standard pmd_none_or_clear_bad, the result is
|
|
* undefined so behaving like if the pmd was none is safe (because it
|
|
* can return none anyway). The compiler level barrier() is critically
|
|
* important to compute the two checks atomically on the same pmdval.
|
|
*
|
|
* For 32bit kernels with a 64bit large pmd_t this automatically takes
|
|
* care of reading the pmd atomically to avoid SMP race conditions
|
|
* against pmd_populate() when the mmap_sem is hold for reading by the
|
|
* caller (a special atomic read not done by "gcc" as in the generic
|
|
* version above, is also needed when THP is disabled because the page
|
|
* fault can populate the pmd from under us).
|
|
*/
|
|
static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
|
|
{
|
|
pmd_t pmdval = pmd_read_atomic(pmd);
|
|
/*
|
|
* The barrier will stabilize the pmdval in a register or on
|
|
* the stack so that it will stop changing under the code.
|
|
*/
|
|
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
|
|
barrier();
|
|
#endif
|
|
if (pmd_none(pmdval))
|
|
return 1;
|
|
if (unlikely(pmd_bad(pmdval))) {
|
|
if (!pmd_trans_huge(pmdval))
|
|
pmd_clear_bad(pmd);
|
|
return 1;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* This is a noop if Transparent Hugepage Support is not built into
|
|
* the kernel. Otherwise it is equivalent to
|
|
* pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
|
|
* places that already verified the pmd is not none and they want to
|
|
* walk ptes while holding the mmap sem in read mode (write mode don't
|
|
* need this). If THP is not enabled, the pmd can't go away under the
|
|
* code even if MADV_DONTNEED runs, but if THP is enabled we need to
|
|
* run a pmd_trans_unstable before walking the ptes after
|
|
* split_huge_page_pmd returns (because it may have run when the pmd
|
|
* become null, but then a page fault can map in a THP and not a
|
|
* regular page).
|
|
*/
|
|
static inline int pmd_trans_unstable(pmd_t *pmd)
|
|
{
|
|
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
|
|
return pmd_none_or_trans_huge_or_clear_bad(pmd);
|
|
#else
|
|
return 0;
|
|
#endif
|
|
}
|
|
|
|
#endif /* CONFIG_MMU */
|
|
|
|
#endif /* !__ASSEMBLY__ */
|
|
|
|
#endif /* _ASM_GENERIC_PGTABLE_H */
|