mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-24 21:24:00 +08:00
ee18f6314f
Factor out some boilerplate code. Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Mika Westerberg <mika.westerberg@iki.fi> Acked-by: Alexander Sverdlin <subaparts@yandex.ru> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
473 lines
11 KiB
C
473 lines
11 KiB
C
/*
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* linux/sound/soc/ep93xx-i2s.c
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* EP93xx I2S driver
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*
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* Copyright (C) 2010 Ryan Mallon
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*
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* Based on the original driver by:
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* Copyright (C) 2007 Chase Douglas <chasedouglas@gmail>
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* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/initval.h>
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#include <sound/soc.h>
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#include <mach/hardware.h>
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#include <mach/ep93xx-regs.h>
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#include <mach/dma.h>
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#include "ep93xx-pcm.h"
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#define EP93XX_I2S_TXCLKCFG 0x00
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#define EP93XX_I2S_RXCLKCFG 0x04
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#define EP93XX_I2S_GLCTRL 0x0C
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#define EP93XX_I2S_TXLINCTRLDATA 0x28
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#define EP93XX_I2S_TXCTRL 0x2C
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#define EP93XX_I2S_TXWRDLEN 0x30
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#define EP93XX_I2S_TX0EN 0x34
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#define EP93XX_I2S_RXLINCTRLDATA 0x58
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#define EP93XX_I2S_RXCTRL 0x5C
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#define EP93XX_I2S_RXWRDLEN 0x60
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#define EP93XX_I2S_RX0EN 0x64
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#define EP93XX_I2S_WRDLEN_16 (0 << 0)
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#define EP93XX_I2S_WRDLEN_24 (1 << 0)
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#define EP93XX_I2S_WRDLEN_32 (2 << 0)
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#define EP93XX_I2S_LINCTRLDATA_R_JUST (1 << 2) /* Right justify */
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#define EP93XX_I2S_CLKCFG_LRS (1 << 0) /* lrclk polarity */
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#define EP93XX_I2S_CLKCFG_CKP (1 << 1) /* Bit clock polarity */
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#define EP93XX_I2S_CLKCFG_REL (1 << 2) /* First bit transition */
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#define EP93XX_I2S_CLKCFG_MASTER (1 << 3) /* Master mode */
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#define EP93XX_I2S_CLKCFG_NBCG (1 << 4) /* Not bit clock gating */
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struct ep93xx_i2s_info {
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struct clk *mclk;
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struct clk *sclk;
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struct clk *lrclk;
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struct ep93xx_pcm_dma_params *dma_params;
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struct resource *mem;
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void __iomem *regs;
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};
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struct ep93xx_pcm_dma_params ep93xx_i2s_dma_params[] = {
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[SNDRV_PCM_STREAM_PLAYBACK] = {
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.name = "i2s-pcm-out",
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.dma_port = EP93XX_DMA_I2S1,
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},
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[SNDRV_PCM_STREAM_CAPTURE] = {
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.name = "i2s-pcm-in",
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.dma_port = EP93XX_DMA_I2S1,
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},
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};
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static inline void ep93xx_i2s_write_reg(struct ep93xx_i2s_info *info,
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unsigned reg, unsigned val)
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{
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__raw_writel(val, info->regs + reg);
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}
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static inline unsigned ep93xx_i2s_read_reg(struct ep93xx_i2s_info *info,
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unsigned reg)
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{
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return __raw_readl(info->regs + reg);
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}
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static void ep93xx_i2s_enable(struct ep93xx_i2s_info *info, int stream)
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{
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unsigned base_reg;
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int i;
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if ((ep93xx_i2s_read_reg(info, EP93XX_I2S_TX0EN) & 0x1) == 0 &&
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(ep93xx_i2s_read_reg(info, EP93XX_I2S_RX0EN) & 0x1) == 0) {
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/* Enable clocks */
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clk_enable(info->mclk);
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clk_enable(info->sclk);
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clk_enable(info->lrclk);
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/* Enable i2s */
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ep93xx_i2s_write_reg(info, EP93XX_I2S_GLCTRL, 1);
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}
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/* Enable fifos */
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if (stream == SNDRV_PCM_STREAM_PLAYBACK)
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base_reg = EP93XX_I2S_TX0EN;
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else
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base_reg = EP93XX_I2S_RX0EN;
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for (i = 0; i < 3; i++)
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ep93xx_i2s_write_reg(info, base_reg + (i * 4), 1);
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}
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static void ep93xx_i2s_disable(struct ep93xx_i2s_info *info, int stream)
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{
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unsigned base_reg;
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int i;
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/* Disable fifos */
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if (stream == SNDRV_PCM_STREAM_PLAYBACK)
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base_reg = EP93XX_I2S_TX0EN;
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else
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base_reg = EP93XX_I2S_RX0EN;
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for (i = 0; i < 3; i++)
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ep93xx_i2s_write_reg(info, base_reg + (i * 4), 0);
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if ((ep93xx_i2s_read_reg(info, EP93XX_I2S_TX0EN) & 0x1) == 0 &&
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(ep93xx_i2s_read_reg(info, EP93XX_I2S_RX0EN) & 0x1) == 0) {
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/* Disable i2s */
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ep93xx_i2s_write_reg(info, EP93XX_I2S_GLCTRL, 0);
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/* Disable clocks */
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clk_disable(info->lrclk);
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clk_disable(info->sclk);
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clk_disable(info->mclk);
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}
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}
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static int ep93xx_i2s_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct ep93xx_i2s_info *info = snd_soc_dai_get_drvdata(dai);
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struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
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snd_soc_dai_set_dma_data(cpu_dai, substream,
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&info->dma_params[substream->stream]);
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return 0;
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}
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static void ep93xx_i2s_shutdown(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct ep93xx_i2s_info *info = snd_soc_dai_get_drvdata(dai);
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ep93xx_i2s_disable(info, substream->stream);
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}
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static int ep93xx_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
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unsigned int fmt)
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{
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struct ep93xx_i2s_info *info = snd_soc_dai_get_drvdata(cpu_dai);
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unsigned int clk_cfg, lin_ctrl;
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clk_cfg = ep93xx_i2s_read_reg(info, EP93XX_I2S_RXCLKCFG);
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lin_ctrl = ep93xx_i2s_read_reg(info, EP93XX_I2S_RXLINCTRLDATA);
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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clk_cfg |= EP93XX_I2S_CLKCFG_REL;
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lin_ctrl &= ~EP93XX_I2S_LINCTRLDATA_R_JUST;
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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clk_cfg &= ~EP93XX_I2S_CLKCFG_REL;
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lin_ctrl &= ~EP93XX_I2S_LINCTRLDATA_R_JUST;
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break;
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case SND_SOC_DAIFMT_RIGHT_J:
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clk_cfg &= ~EP93XX_I2S_CLKCFG_REL;
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lin_ctrl |= EP93XX_I2S_LINCTRLDATA_R_JUST;
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break;
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default:
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return -EINVAL;
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}
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBS_CFS:
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/* CPU is master */
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clk_cfg |= EP93XX_I2S_CLKCFG_MASTER;
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break;
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case SND_SOC_DAIFMT_CBM_CFM:
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/* Codec is master */
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clk_cfg &= ~EP93XX_I2S_CLKCFG_MASTER;
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break;
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default:
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return -EINVAL;
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}
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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/* Negative bit clock, lrclk low on left word */
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clk_cfg &= ~(EP93XX_I2S_CLKCFG_CKP | EP93XX_I2S_CLKCFG_REL);
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break;
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case SND_SOC_DAIFMT_NB_IF:
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/* Negative bit clock, lrclk low on right word */
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clk_cfg &= ~EP93XX_I2S_CLKCFG_CKP;
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clk_cfg |= EP93XX_I2S_CLKCFG_REL;
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break;
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case SND_SOC_DAIFMT_IB_NF:
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/* Positive bit clock, lrclk low on left word */
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clk_cfg |= EP93XX_I2S_CLKCFG_CKP;
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clk_cfg &= ~EP93XX_I2S_CLKCFG_REL;
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break;
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case SND_SOC_DAIFMT_IB_IF:
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/* Positive bit clock, lrclk low on right word */
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clk_cfg |= EP93XX_I2S_CLKCFG_CKP | EP93XX_I2S_CLKCFG_REL;
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break;
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}
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/* Write new register values */
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ep93xx_i2s_write_reg(info, EP93XX_I2S_RXCLKCFG, clk_cfg);
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ep93xx_i2s_write_reg(info, EP93XX_I2S_TXCLKCFG, clk_cfg);
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ep93xx_i2s_write_reg(info, EP93XX_I2S_RXLINCTRLDATA, lin_ctrl);
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ep93xx_i2s_write_reg(info, EP93XX_I2S_TXLINCTRLDATA, lin_ctrl);
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return 0;
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}
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static int ep93xx_i2s_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct ep93xx_i2s_info *info = snd_soc_dai_get_drvdata(dai);
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unsigned word_len, div, sdiv, lrdiv;
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int err;
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S16_LE:
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word_len = EP93XX_I2S_WRDLEN_16;
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break;
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case SNDRV_PCM_FORMAT_S24_LE:
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word_len = EP93XX_I2S_WRDLEN_24;
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break;
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case SNDRV_PCM_FORMAT_S32_LE:
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word_len = EP93XX_I2S_WRDLEN_32;
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break;
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default:
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return -EINVAL;
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}
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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ep93xx_i2s_write_reg(info, EP93XX_I2S_TXWRDLEN, word_len);
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else
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ep93xx_i2s_write_reg(info, EP93XX_I2S_RXWRDLEN, word_len);
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/*
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* EP93xx I2S module can be setup so SCLK / LRCLK value can be
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* 32, 64, 128. MCLK / SCLK value can be 2 and 4.
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* We set LRCLK equal to `rate' and minimum SCLK / LRCLK
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* value is 64, because our sample size is 32 bit * 2 channels.
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* I2S standard permits us to transmit more bits than
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* the codec uses.
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*/
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div = clk_get_rate(info->mclk) / params_rate(params);
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sdiv = 4;
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if (div > (256 + 512) / 2) {
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lrdiv = 128;
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} else {
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lrdiv = 64;
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if (div < (128 + 256) / 2)
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sdiv = 2;
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}
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err = clk_set_rate(info->sclk, clk_get_rate(info->mclk) / sdiv);
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if (err)
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return err;
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err = clk_set_rate(info->lrclk, clk_get_rate(info->sclk) / lrdiv);
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if (err)
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return err;
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ep93xx_i2s_enable(info, substream->stream);
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return 0;
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}
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static int ep93xx_i2s_set_sysclk(struct snd_soc_dai *cpu_dai, int clk_id,
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unsigned int freq, int dir)
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{
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struct ep93xx_i2s_info *info = snd_soc_dai_get_drvdata(cpu_dai);
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if (dir == SND_SOC_CLOCK_IN || clk_id != 0)
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return -EINVAL;
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return clk_set_rate(info->mclk, freq);
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}
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#ifdef CONFIG_PM
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static int ep93xx_i2s_suspend(struct snd_soc_dai *dai)
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{
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struct ep93xx_i2s_info *info = snd_soc_dai_get_drvdata(dai);
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if (!dai->active)
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return 0;
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ep93xx_i2s_disable(info, SNDRV_PCM_STREAM_PLAYBACK);
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ep93xx_i2s_disable(info, SNDRV_PCM_STREAM_CAPTURE);
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return 0;
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}
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static int ep93xx_i2s_resume(struct snd_soc_dai *dai)
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{
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struct ep93xx_i2s_info *info = snd_soc_dai_get_drvdata(dai);
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if (!dai->active)
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return 0;
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ep93xx_i2s_enable(info, SNDRV_PCM_STREAM_PLAYBACK);
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ep93xx_i2s_enable(info, SNDRV_PCM_STREAM_CAPTURE);
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return 0;
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}
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#else
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#define ep93xx_i2s_suspend NULL
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#define ep93xx_i2s_resume NULL
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#endif
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static const struct snd_soc_dai_ops ep93xx_i2s_dai_ops = {
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.startup = ep93xx_i2s_startup,
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.shutdown = ep93xx_i2s_shutdown,
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.hw_params = ep93xx_i2s_hw_params,
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.set_sysclk = ep93xx_i2s_set_sysclk,
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.set_fmt = ep93xx_i2s_set_dai_fmt,
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};
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#define EP93XX_I2S_FORMATS (SNDRV_PCM_FMTBIT_S32_LE)
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static struct snd_soc_dai_driver ep93xx_i2s_dai = {
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.symmetric_rates= 1,
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.suspend = ep93xx_i2s_suspend,
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.resume = ep93xx_i2s_resume,
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.playback = {
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.channels_min = 2,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_192000,
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.formats = EP93XX_I2S_FORMATS,
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},
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.capture = {
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.channels_min = 2,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_192000,
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.formats = EP93XX_I2S_FORMATS,
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},
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.ops = &ep93xx_i2s_dai_ops,
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};
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static int ep93xx_i2s_probe(struct platform_device *pdev)
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{
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struct ep93xx_i2s_info *info;
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struct resource *res;
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int err;
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info = kzalloc(sizeof(struct ep93xx_i2s_info), GFP_KERNEL);
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if (!info) {
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err = -ENOMEM;
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goto fail;
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}
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dev_set_drvdata(&pdev->dev, info);
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info->dma_params = ep93xx_i2s_dma_params;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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err = -ENODEV;
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goto fail_free_info;
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}
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info->mem = request_mem_region(res->start, resource_size(res),
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pdev->name);
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if (!info->mem) {
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err = -EBUSY;
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goto fail_free_info;
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}
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info->regs = ioremap(info->mem->start, resource_size(info->mem));
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if (!info->regs) {
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err = -ENXIO;
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goto fail_release_mem;
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}
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info->mclk = clk_get(&pdev->dev, "mclk");
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if (IS_ERR(info->mclk)) {
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err = PTR_ERR(info->mclk);
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goto fail_unmap_mem;
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}
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info->sclk = clk_get(&pdev->dev, "sclk");
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if (IS_ERR(info->sclk)) {
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err = PTR_ERR(info->sclk);
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goto fail_put_mclk;
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}
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info->lrclk = clk_get(&pdev->dev, "lrclk");
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if (IS_ERR(info->lrclk)) {
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err = PTR_ERR(info->lrclk);
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goto fail_put_sclk;
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}
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err = snd_soc_register_dai(&pdev->dev, &ep93xx_i2s_dai);
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if (err)
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goto fail_put_lrclk;
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return 0;
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fail_put_lrclk:
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clk_put(info->lrclk);
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fail_put_sclk:
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clk_put(info->sclk);
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fail_put_mclk:
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clk_put(info->mclk);
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fail_unmap_mem:
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iounmap(info->regs);
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fail_release_mem:
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release_mem_region(info->mem->start, resource_size(info->mem));
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fail_free_info:
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kfree(info);
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fail:
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return err;
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}
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static int __devexit ep93xx_i2s_remove(struct platform_device *pdev)
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{
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struct ep93xx_i2s_info *info = dev_get_drvdata(&pdev->dev);
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snd_soc_unregister_dai(&pdev->dev);
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clk_put(info->lrclk);
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clk_put(info->sclk);
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clk_put(info->mclk);
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iounmap(info->regs);
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release_mem_region(info->mem->start, resource_size(info->mem));
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kfree(info);
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return 0;
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}
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static struct platform_driver ep93xx_i2s_driver = {
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.probe = ep93xx_i2s_probe,
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.remove = __devexit_p(ep93xx_i2s_remove),
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.driver = {
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.name = "ep93xx-i2s",
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.owner = THIS_MODULE,
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},
|
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};
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module_platform_driver(ep93xx_i2s_driver);
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|
|
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MODULE_ALIAS("platform:ep93xx-i2s");
|
|
MODULE_AUTHOR("Ryan Mallon");
|
|
MODULE_DESCRIPTION("EP93XX I2S driver");
|
|
MODULE_LICENSE("GPL");
|