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24cab82c34
Add the basic data structure that expresses an MSI to LPI translation as well as the allocation/release hooks. The size of the cache is arbitrarily defined as 16*nr_vcpus. Tested-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Marc Zyngier <maz@kernel.org> |
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arm_arch_timer.h | ||
arm_pmu.h | ||
arm_psci.h | ||
arm_vgic.h | ||
iodev.h |