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HiSilicon erratum 162001800 describes the limitation of SMMUv3 PMCG implementation on HiSilicon Hip08 platforms. On these platforms, the PMCG event counter registers (SMMU_PMCG_EVCNTRn) are read only and as a result it is not possible to set the initial counter period value on event monitor start. To work around this, the current value of the counter is read and used for delta calculations. OEM information from ACPI header is used to identify the affected hardware platforms. Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> [will: update silicon-errata.txt and add reason string to acpi match] Signed-off-by: Will Deacon <will.deacon@arm.com> |
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| .. | ||
| hisilicon | ||
| arm_dsu_pmu.c | ||
| arm_pmu_acpi.c | ||
| arm_pmu_platform.c | ||
| arm_pmu.c | ||
| arm_smmuv3_pmu.c | ||
| arm_spe_pmu.c | ||
| arm-cci.c | ||
| arm-ccn.c | ||
| Kconfig | ||
| Makefile | ||
| qcom_l2_pmu.c | ||
| qcom_l3_pmu.c | ||
| thunderx2_pmu.c | ||
| xgene_pmu.c | ||