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https://github.com/edk2-porting/linux-next.git
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7733f6c32e
This patch introduce new Cadence USBSS DRD driver to Linux kernel. The Cadence USBSS DRD Controller is a highly configurable IP Core which can be instantiated as Dual-Role Device (DRD), Peripheral Only and Host Only (XHCI)configurations. The current driver has been validated with FPGA platform. We have support for PCIe bus, which is used on FPGA prototyping. The host side of USBSS-DRD controller is compliant with XHCI specification, so it works with standard XHCI Linux driver. Signed-off-by: Pawel Laszczak <pawell@cadence.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
382 lines
8.7 KiB
C
382 lines
8.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Cadence USBSS DRD Driver.
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*
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* Copyright (C) 2018-2019 Cadence.
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* Copyright (C) 2019 Texas Instruments
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*
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* Author: Pawel Laszczak <pawell@cadence.com>
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* Roger Quadros <rogerq@ti.com>
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*
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*
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*/
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/iopoll.h>
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#include <linux/usb/otg.h>
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#include "gadget.h"
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#include "drd.h"
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#include "core.h"
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/**
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* cdns3_set_mode - change mode of OTG Core
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* @cdns: pointer to context structure
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* @mode: selected mode from cdns_role
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*
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* Returns 0 on success otherwise negative errno
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*/
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int cdns3_set_mode(struct cdns3 *cdns, enum usb_dr_mode mode)
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{
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int ret = 0;
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u32 reg;
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switch (mode) {
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case USB_DR_MODE_PERIPHERAL:
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break;
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case USB_DR_MODE_HOST:
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break;
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case USB_DR_MODE_OTG:
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dev_dbg(cdns->dev, "Set controller to OTG mode\n");
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if (cdns->version == CDNS3_CONTROLLER_V1) {
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reg = readl(&cdns->otg_v1_regs->override);
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reg |= OVERRIDE_IDPULLUP;
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writel(reg, &cdns->otg_v1_regs->override);
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} else {
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reg = readl(&cdns->otg_v0_regs->ctrl1);
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reg |= OVERRIDE_IDPULLUP_V0;
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writel(reg, &cdns->otg_v0_regs->ctrl1);
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}
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/*
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* Hardware specification says: "ID_VALUE must be valid within
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* 50ms after idpullup is set to '1" so driver must wait
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* 50ms before reading this pin.
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*/
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usleep_range(50000, 60000);
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break;
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default:
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dev_err(cdns->dev, "Unsupported mode of operation %d\n", mode);
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return -EINVAL;
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}
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return ret;
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}
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int cdns3_get_id(struct cdns3 *cdns)
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{
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int id;
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id = readl(&cdns->otg_regs->sts) & OTGSTS_ID_VALUE;
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dev_dbg(cdns->dev, "OTG ID: %d", id);
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return id;
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}
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int cdns3_get_vbus(struct cdns3 *cdns)
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{
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int vbus;
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vbus = !!(readl(&cdns->otg_regs->sts) & OTGSTS_VBUS_VALID);
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dev_dbg(cdns->dev, "OTG VBUS: %d", vbus);
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return vbus;
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}
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int cdns3_is_host(struct cdns3 *cdns)
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{
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if (cdns->dr_mode == USB_DR_MODE_HOST)
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return 1;
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else if (!cdns3_get_id(cdns))
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return 1;
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return 0;
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}
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int cdns3_is_device(struct cdns3 *cdns)
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{
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if (cdns->dr_mode == USB_DR_MODE_PERIPHERAL)
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return 1;
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else if (cdns->dr_mode == USB_DR_MODE_OTG)
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if (cdns3_get_id(cdns))
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return 1;
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return 0;
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}
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/**
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* cdns3_otg_disable_irq - Disable all OTG interrupts
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* @cdns: Pointer to controller context structure
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*/
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static void cdns3_otg_disable_irq(struct cdns3 *cdns)
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{
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writel(0, &cdns->otg_regs->ien);
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}
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/**
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* cdns3_otg_enable_irq - enable id and sess_valid interrupts
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* @cdns: Pointer to controller context structure
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*/
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static void cdns3_otg_enable_irq(struct cdns3 *cdns)
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{
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writel(OTGIEN_ID_CHANGE_INT | OTGIEN_VBUSVALID_RISE_INT |
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OTGIEN_VBUSVALID_FALL_INT, &cdns->otg_regs->ien);
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}
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/**
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* cdns3_drd_switch_host - start/stop host
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* @cdns: Pointer to controller context structure
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* @on: 1 for start, 0 for stop
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*
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* Returns 0 on success otherwise negative errno
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*/
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int cdns3_drd_switch_host(struct cdns3 *cdns, int on)
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{
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int ret, val;
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u32 reg = OTGCMD_OTG_DIS;
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/* switch OTG core */
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if (on) {
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writel(OTGCMD_HOST_BUS_REQ | reg, &cdns->otg_regs->cmd);
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dev_dbg(cdns->dev, "Waiting till Host mode is turned on\n");
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ret = readl_poll_timeout_atomic(&cdns->otg_regs->sts, val,
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val & OTGSTS_XHCI_READY,
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1, 100000);
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if (ret) {
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dev_err(cdns->dev, "timeout waiting for xhci_ready\n");
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return ret;
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}
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} else {
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writel(OTGCMD_HOST_BUS_DROP | OTGCMD_DEV_BUS_DROP |
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OTGCMD_DEV_POWER_OFF | OTGCMD_HOST_POWER_OFF,
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&cdns->otg_regs->cmd);
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/* Waiting till H_IDLE state.*/
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readl_poll_timeout_atomic(&cdns->otg_regs->state, val,
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!(val & OTGSTATE_HOST_STATE_MASK),
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1, 2000000);
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}
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return 0;
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}
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/**
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* cdns3_drd_switch_gadget - start/stop gadget
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* @cdns: Pointer to controller context structure
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* @on: 1 for start, 0 for stop
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*
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* Returns 0 on success otherwise negative errno
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*/
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int cdns3_drd_switch_gadget(struct cdns3 *cdns, int on)
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{
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int ret, val;
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u32 reg = OTGCMD_OTG_DIS;
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/* switch OTG core */
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if (on) {
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writel(OTGCMD_DEV_BUS_REQ | reg, &cdns->otg_regs->cmd);
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dev_dbg(cdns->dev, "Waiting till Device mode is turned on\n");
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ret = readl_poll_timeout_atomic(&cdns->otg_regs->sts, val,
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val & OTGSTS_DEV_READY,
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1, 100000);
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if (ret) {
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dev_err(cdns->dev, "timeout waiting for dev_ready\n");
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return ret;
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}
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} else {
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/*
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* driver should wait at least 10us after disabling Device
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* before turning-off Device (DEV_BUS_DROP)
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*/
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usleep_range(20, 30);
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writel(OTGCMD_HOST_BUS_DROP | OTGCMD_DEV_BUS_DROP |
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OTGCMD_DEV_POWER_OFF | OTGCMD_HOST_POWER_OFF,
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&cdns->otg_regs->cmd);
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/* Waiting till DEV_IDLE state.*/
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readl_poll_timeout_atomic(&cdns->otg_regs->state, val,
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!(val & OTGSTATE_DEV_STATE_MASK),
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1, 2000000);
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}
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return 0;
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}
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/**
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* cdns3_init_otg_mode - initialize drd controller
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* @cdns: Pointer to controller context structure
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*
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* Returns 0 on success otherwise negative errno
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*/
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static int cdns3_init_otg_mode(struct cdns3 *cdns)
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{
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int ret = 0;
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cdns3_otg_disable_irq(cdns);
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/* clear all interrupts */
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writel(~0, &cdns->otg_regs->ivect);
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ret = cdns3_set_mode(cdns, USB_DR_MODE_OTG);
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if (ret)
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return ret;
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cdns3_otg_enable_irq(cdns);
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return ret;
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}
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/**
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* cdns3_drd_update_mode - initialize mode of operation
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* @cdns: Pointer to controller context structure
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*
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* Returns 0 on success otherwise negative errno
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*/
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int cdns3_drd_update_mode(struct cdns3 *cdns)
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{
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int ret = 0;
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switch (cdns->dr_mode) {
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case USB_DR_MODE_PERIPHERAL:
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ret = cdns3_set_mode(cdns, USB_DR_MODE_PERIPHERAL);
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break;
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case USB_DR_MODE_HOST:
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ret = cdns3_set_mode(cdns, USB_DR_MODE_HOST);
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break;
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case USB_DR_MODE_OTG:
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ret = cdns3_init_otg_mode(cdns);
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break;
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default:
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dev_err(cdns->dev, "Unsupported mode of operation %d\n",
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cdns->dr_mode);
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return -EINVAL;
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}
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return ret;
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}
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static irqreturn_t cdns3_drd_thread_irq(int irq, void *data)
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{
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struct cdns3 *cdns = data;
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cdns3_hw_role_switch(cdns);
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return IRQ_HANDLED;
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}
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/**
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* cdns3_drd_irq - interrupt handler for OTG events
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*
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* @irq: irq number for cdns3 core device
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* @data: structure of cdns3
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*
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* Returns IRQ_HANDLED or IRQ_NONE
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*/
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static irqreturn_t cdns3_drd_irq(int irq, void *data)
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{
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irqreturn_t ret = IRQ_NONE;
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struct cdns3 *cdns = data;
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u32 reg;
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if (cdns->dr_mode != USB_DR_MODE_OTG)
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return ret;
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reg = readl(&cdns->otg_regs->ivect);
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if (!reg)
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return ret;
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if (reg & OTGIEN_ID_CHANGE_INT) {
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dev_dbg(cdns->dev, "OTG IRQ: new ID: %d\n",
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cdns3_get_id(cdns));
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ret = IRQ_WAKE_THREAD;
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}
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if (reg & (OTGIEN_VBUSVALID_RISE_INT | OTGIEN_VBUSVALID_FALL_INT)) {
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dev_dbg(cdns->dev, "OTG IRQ: new VBUS: %d\n",
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cdns3_get_vbus(cdns));
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ret = IRQ_WAKE_THREAD;
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}
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writel(~0, &cdns->otg_regs->ivect);
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return ret;
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}
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int cdns3_drd_init(struct cdns3 *cdns)
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{
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void __iomem *regs;
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int ret = 0;
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u32 state;
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regs = devm_ioremap_resource(cdns->dev, &cdns->otg_res);
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if (IS_ERR(regs))
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return PTR_ERR(regs);
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/* Detection of DRD version. Controller has been released
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* in two versions. Both are similar, but they have same changes
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* in register maps.
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* The first register in old version is command register and it's read
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* only, so driver should read 0 from it. On the other hand, in v1
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* the first register contains device ID number which is not set to 0.
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* Driver uses this fact to detect the proper version of
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* controller.
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*/
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cdns->otg_v0_regs = regs;
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if (!readl(&cdns->otg_v0_regs->cmd)) {
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cdns->version = CDNS3_CONTROLLER_V0;
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cdns->otg_v1_regs = NULL;
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cdns->otg_regs = regs;
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writel(1, &cdns->otg_v0_regs->simulate);
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dev_info(cdns->dev, "DRD version v0 (%08x)\n",
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readl(&cdns->otg_v0_regs->version));
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} else {
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cdns->otg_v0_regs = NULL;
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cdns->otg_v1_regs = regs;
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cdns->otg_regs = (void *)&cdns->otg_v1_regs->cmd;
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cdns->version = CDNS3_CONTROLLER_V1;
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writel(1, &cdns->otg_v1_regs->simulate);
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dev_info(cdns->dev, "DRD version v1 (ID: %08x, rev: %08x)\n",
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readl(&cdns->otg_v1_regs->did),
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readl(&cdns->otg_v1_regs->rid));
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}
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state = OTGSTS_STRAP(readl(&cdns->otg_regs->sts));
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/* Update dr_mode according to STRAP configuration. */
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cdns->dr_mode = USB_DR_MODE_OTG;
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if (state == OTGSTS_STRAP_HOST) {
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dev_dbg(cdns->dev, "Controller strapped to HOST\n");
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cdns->dr_mode = USB_DR_MODE_HOST;
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} else if (state == OTGSTS_STRAP_GADGET) {
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dev_dbg(cdns->dev, "Controller strapped to PERIPHERAL\n");
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cdns->dr_mode = USB_DR_MODE_PERIPHERAL;
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}
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ret = devm_request_threaded_irq(cdns->dev, cdns->otg_irq,
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cdns3_drd_irq,
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cdns3_drd_thread_irq,
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IRQF_SHARED,
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dev_name(cdns->dev), cdns);
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if (ret) {
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dev_err(cdns->dev, "couldn't get otg_irq\n");
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return ret;
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}
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state = readl(&cdns->otg_regs->sts);
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if (OTGSTS_OTG_NRDY(state) != 0) {
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dev_err(cdns->dev, "Cadence USB3 OTG device not ready\n");
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return -ENODEV;
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}
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return ret;
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}
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int cdns3_drd_exit(struct cdns3 *cdns)
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{
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cdns3_otg_disable_irq(cdns);
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return 0;
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}
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