Jayachandran C 220d9122e8 MIPS: Netlogic: Optimize EIMR/EIRR accesses in 32-bit ... Provide functions ack_c0_eirr(), set_c0_eimr(), clear_c0_eimr() and read_c0_eirr_and_eimr() that do the EIMR and EIRR operations and update the interrupt handling code to use these functions. Also, use the EIMR register functions to mask interrupts in the irq code. The 64-bit interrupt request and mask registers (EIRR and EIMR) are accessed when the interrupts are off, and the common operations are to set or clear a bit in these registers. Using the 64-bit c0 access functions for these operations is not optimal in 32-bit, because it will disable/restore interrupts and split/join the 64-bit value during each register access. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4790/ Signed-off-by: John Crispin <blogic@openwrt.org>		2013-02-17 00:15:19 +01:00
..
earlycons.c	MIPS: Netlogic: early console fix	2012-07-24 18:24:44 +02:00
irq.c	MIPS: Netlogic: Optimize EIMR/EIRR accesses in 32-bit	2013-02-17 00:15:19 +01:00
Makefile	MIPS: Netlogic: Merge some of XLR/XLP wakup code	2011-12-07 22:04:56 +00:00
smp.c	MIPS: Netlogic: Optimize EIMR/EIRR accesses in 32-bit	2013-02-17 00:15:19 +01:00
smpboot.S	MIPS: Netlogic: Pass cpuid to early_init_secondary	2012-11-09 11:37:19 +01:00
time.c	MIPS: Netlogic: Move code common with XLP to common/	2011-12-07 22:04:55 +00:00