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de320199c0
Remove remaining references to saved registers now that uart_handle_sysrq_char() does not want them. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
815 lines
20 KiB
C
815 lines
20 KiB
C
/*
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* dz.c: Serial port driver for DECstations equipped
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* with the DZ chipset.
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*
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* Copyright (C) 1998 Olivier A. D. Lebaillif
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*
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* Email: olivier.lebaillif@ifrsys.com
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*
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* Copyright (C) 2004, 2006 Maciej W. Rozycki
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*
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* [31-AUG-98] triemer
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* Changed IRQ to use Harald's dec internals interrupts.h
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* removed base_addr code - moving address assignment to setup.c
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* Changed name of dz_init to rs_init to be consistent with tc code
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* [13-NOV-98] triemer fixed code to receive characters
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* after patches by harald to irq code.
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* [09-JAN-99] triemer minor fix for schedule - due to removal of timeout
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* field from "current" - somewhere between 2.1.121 and 2.1.131
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Qua Jun 27 15:02:26 BRT 2001
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* [27-JUN-2001] Arnaldo Carvalho de Melo <acme@conectiva.com.br> - cleanups
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*
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* Parts (C) 1999 David Airlie, airlied@linux.ie
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* [07-SEP-99] Bugfixes
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*
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* [06-Jan-2002] Russell King <rmk@arm.linux.org.uk>
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* Converted to new serial core
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*/
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#undef DEBUG_DZ
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#if defined(CONFIG_SERIAL_DZ_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <linux/sysrq.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/serial_core.h>
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#include <linux/serial.h>
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#include <asm/bootinfo.h>
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#include <asm/dec/interrupts.h>
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#include <asm/dec/kn01.h>
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#include <asm/dec/kn02.h>
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#include <asm/dec/machtype.h>
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#include <asm/dec/prom.h>
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#include <asm/irq.h>
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#include <asm/system.h>
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#include <asm/uaccess.h>
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#include "dz.h"
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static char *dz_name = "DECstation DZ serial driver version ";
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static char *dz_version = "1.03";
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struct dz_port {
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struct uart_port port;
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unsigned int cflag;
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};
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static struct dz_port dz_ports[DZ_NB_PORT];
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/*
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* ------------------------------------------------------------
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* dz_in () and dz_out ()
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*
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* These routines are used to access the registers of the DZ
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* chip, hiding relocation differences between implementation.
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* ------------------------------------------------------------
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*/
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static inline unsigned short dz_in(struct dz_port *dport, unsigned offset)
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{
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volatile unsigned short *addr =
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(volatile unsigned short *) (dport->port.membase + offset);
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return *addr;
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}
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static inline void dz_out(struct dz_port *dport, unsigned offset,
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unsigned short value)
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{
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volatile unsigned short *addr =
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(volatile unsigned short *) (dport->port.membase + offset);
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*addr = value;
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}
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/*
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* ------------------------------------------------------------
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* rs_stop () and rs_start ()
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*
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* These routines are called before setting or resetting
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* tty->stopped. They enable or disable transmitter interrupts,
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* as necessary.
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* ------------------------------------------------------------
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*/
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static void dz_stop_tx(struct uart_port *uport)
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{
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struct dz_port *dport = (struct dz_port *)uport;
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unsigned short tmp, mask = 1 << dport->port.line;
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unsigned long flags;
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spin_lock_irqsave(&dport->port.lock, flags);
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tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
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tmp &= ~mask; /* clear the TX flag */
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dz_out(dport, DZ_TCR, tmp);
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spin_unlock_irqrestore(&dport->port.lock, flags);
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}
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static void dz_start_tx(struct uart_port *uport)
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{
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struct dz_port *dport = (struct dz_port *)uport;
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unsigned short tmp, mask = 1 << dport->port.line;
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unsigned long flags;
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spin_lock_irqsave(&dport->port.lock, flags);
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tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
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tmp |= mask; /* set the TX flag */
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dz_out(dport, DZ_TCR, tmp);
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spin_unlock_irqrestore(&dport->port.lock, flags);
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}
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static void dz_stop_rx(struct uart_port *uport)
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{
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struct dz_port *dport = (struct dz_port *)uport;
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unsigned long flags;
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spin_lock_irqsave(&dport->port.lock, flags);
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dport->cflag &= ~DZ_CREAD;
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dz_out(dport, DZ_LPR, dport->cflag | dport->port.line);
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spin_unlock_irqrestore(&dport->port.lock, flags);
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}
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static void dz_enable_ms(struct uart_port *port)
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{
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/* nothing to do */
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}
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/*
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* ------------------------------------------------------------
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*
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* Here start the interrupt handling routines. All of the following
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* subroutines are declared as inline and are folded into
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* dz_interrupt. They were separated out for readability's sake.
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*
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* Note: dz_interrupt() is a "fast" interrupt, which means that it
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* runs with interrupts turned off. People who may want to modify
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* dz_interrupt() should try to keep the interrupt handler as fast as
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* possible. After you are done making modifications, it is not a bad
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* idea to do:
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*
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* make drivers/serial/dz.s
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*
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* and look at the resulting assemble code in dz.s.
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*
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* ------------------------------------------------------------
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*/
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/*
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* ------------------------------------------------------------
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* receive_char ()
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*
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* This routine deals with inputs from any lines.
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* ------------------------------------------------------------
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*/
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static inline void dz_receive_chars(struct dz_port *dport_in)
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{
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struct dz_port *dport;
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struct tty_struct *tty = NULL;
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struct uart_icount *icount;
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int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
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unsigned short status;
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unsigned char ch, flag;
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int i;
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while ((status = dz_in(dport_in, DZ_RBUF)) & DZ_DVAL) {
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dport = &dz_ports[LINE(status)];
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tty = dport->port.info->tty; /* point to the proper dev */
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ch = UCHAR(status); /* grab the char */
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icount = &dport->port.icount;
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icount->rx++;
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flag = TTY_NORMAL;
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if (status & DZ_FERR) { /* frame error */
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/*
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* There is no separate BREAK status bit, so
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* treat framing errors as BREAKs for Magic SysRq
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* and SAK; normally, otherwise.
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*/
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if (uart_handle_break(&dport->port))
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continue;
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if (dport->port.flags & UPF_SAK)
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flag = TTY_BREAK;
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else
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flag = TTY_FRAME;
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} else if (status & DZ_OERR) /* overrun error */
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flag = TTY_OVERRUN;
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else if (status & DZ_PERR) /* parity error */
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flag = TTY_PARITY;
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/* keep track of the statistics */
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switch (flag) {
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case TTY_FRAME:
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icount->frame++;
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break;
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case TTY_PARITY:
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icount->parity++;
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break;
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case TTY_OVERRUN:
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icount->overrun++;
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break;
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case TTY_BREAK:
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icount->brk++;
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break;
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default:
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break;
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}
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if (uart_handle_sysrq_char(&dport->port, ch))
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continue;
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if ((status & dport->port.ignore_status_mask) == 0) {
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uart_insert_char(&dport->port,
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status, DZ_OERR, ch, flag);
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lines_rx[LINE(status)] = 1;
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}
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}
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for (i = 0; i < DZ_NB_PORT; i++)
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if (lines_rx[i])
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tty_flip_buffer_push(dz_ports[i].port.info->tty);
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}
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/*
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* ------------------------------------------------------------
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* transmit_char ()
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*
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* This routine deals with outputs to any lines.
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* ------------------------------------------------------------
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*/
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static inline void dz_transmit_chars(struct dz_port *dport_in)
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{
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struct dz_port *dport;
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struct circ_buf *xmit;
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unsigned short status;
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unsigned char tmp;
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status = dz_in(dport_in, DZ_CSR);
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dport = &dz_ports[LINE(status)];
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xmit = &dport->port.info->xmit;
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if (dport->port.x_char) { /* XON/XOFF chars */
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dz_out(dport, DZ_TDR, dport->port.x_char);
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dport->port.icount.tx++;
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dport->port.x_char = 0;
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return;
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}
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/* If nothing to do or stopped or hardware stopped. */
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if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) {
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dz_stop_tx(&dport->port);
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return;
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}
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/*
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* If something to do... (remember the dz has no output fifo,
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* so we go one char at a time) :-<
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*/
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tmp = xmit->buf[xmit->tail];
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xmit->tail = (xmit->tail + 1) & (DZ_XMIT_SIZE - 1);
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dz_out(dport, DZ_TDR, tmp);
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dport->port.icount.tx++;
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if (uart_circ_chars_pending(xmit) < DZ_WAKEUP_CHARS)
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uart_write_wakeup(&dport->port);
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/* Are we are done. */
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if (uart_circ_empty(xmit))
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dz_stop_tx(&dport->port);
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}
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/*
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* ------------------------------------------------------------
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* check_modem_status()
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*
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* DS 3100 & 5100: Only valid for the MODEM line, duh!
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* DS 5000/200: Valid for the MODEM and PRINTER line.
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* ------------------------------------------------------------
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*/
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static inline void check_modem_status(struct dz_port *dport)
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{
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/*
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* FIXME:
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* 1. No status change interrupt; use a timer.
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* 2. Handle the 3100/5000 as appropriate. --macro
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*/
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unsigned short status;
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/* If not the modem line just return. */
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if (dport->port.line != DZ_MODEM)
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return;
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status = dz_in(dport, DZ_MSR);
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/* it's easy, since DSR2 is the only bit in the register */
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if (status)
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dport->port.icount.dsr++;
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}
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/*
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* ------------------------------------------------------------
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* dz_interrupt ()
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*
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* this is the main interrupt routine for the DZ chip.
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* It deals with the multiple ports.
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* ------------------------------------------------------------
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*/
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static irqreturn_t dz_interrupt(int irq, void *dev)
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{
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struct dz_port *dport = (struct dz_port *)dev;
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unsigned short status;
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/* get the reason why we just got an irq */
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status = dz_in(dport, DZ_CSR);
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if ((status & (DZ_RDONE | DZ_RIE)) == (DZ_RDONE | DZ_RIE))
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dz_receive_chars(dport);
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if ((status & (DZ_TRDY | DZ_TIE)) == (DZ_TRDY | DZ_TIE))
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dz_transmit_chars(dport);
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return IRQ_HANDLED;
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}
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/*
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* -------------------------------------------------------------------
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* Here ends the DZ interrupt routines.
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* -------------------------------------------------------------------
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*/
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static unsigned int dz_get_mctrl(struct uart_port *uport)
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{
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/*
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* FIXME: Handle the 3100/5000 as appropriate. --macro
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*/
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struct dz_port *dport = (struct dz_port *)uport;
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unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
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if (dport->port.line == DZ_MODEM) {
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if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR)
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mctrl &= ~TIOCM_DSR;
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}
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return mctrl;
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}
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static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl)
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{
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/*
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* FIXME: Handle the 3100/5000 as appropriate. --macro
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*/
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struct dz_port *dport = (struct dz_port *)uport;
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unsigned short tmp;
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if (dport->port.line == DZ_MODEM) {
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tmp = dz_in(dport, DZ_TCR);
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if (mctrl & TIOCM_DTR)
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tmp &= ~DZ_MODEM_DTR;
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else
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tmp |= DZ_MODEM_DTR;
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dz_out(dport, DZ_TCR, tmp);
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}
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}
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/*
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* -------------------------------------------------------------------
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* startup ()
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*
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* various initialization tasks
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* -------------------------------------------------------------------
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*/
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static int dz_startup(struct uart_port *uport)
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{
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struct dz_port *dport = (struct dz_port *)uport;
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unsigned long flags;
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unsigned short tmp;
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spin_lock_irqsave(&dport->port.lock, flags);
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/* enable the interrupt and the scanning */
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tmp = dz_in(dport, DZ_CSR);
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tmp |= DZ_RIE | DZ_TIE | DZ_MSE;
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dz_out(dport, DZ_CSR, tmp);
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spin_unlock_irqrestore(&dport->port.lock, flags);
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return 0;
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}
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/*
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* -------------------------------------------------------------------
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* shutdown ()
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*
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* This routine will shutdown a serial port; interrupts are disabled, and
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* DTR is dropped if the hangup on close termio flag is on.
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* -------------------------------------------------------------------
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*/
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static void dz_shutdown(struct uart_port *uport)
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{
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dz_stop_tx(uport);
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}
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/*
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* -------------------------------------------------------------------
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* dz_tx_empty() -- get the transmitter empty status
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*
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* Purpose: Let user call ioctl() to get info when the UART physically
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* is emptied. On bus types like RS485, the transmitter must
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* release the bus after transmitting. This must be done when
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* the transmit shift register is empty, not be done when the
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* transmit holding register is empty. This functionality
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* allows an RS485 driver to be written in user space.
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* -------------------------------------------------------------------
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*/
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static unsigned int dz_tx_empty(struct uart_port *uport)
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{
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struct dz_port *dport = (struct dz_port *)uport;
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unsigned short tmp, mask = 1 << dport->port.line;
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tmp = dz_in(dport, DZ_TCR);
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tmp &= mask;
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return tmp ? 0 : TIOCSER_TEMT;
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}
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static void dz_break_ctl(struct uart_port *uport, int break_state)
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{
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/*
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* FIXME: Can't access BREAK bits in TDR easily;
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* reuse the code for polled TX. --macro
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*/
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struct dz_port *dport = (struct dz_port *)uport;
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unsigned long flags;
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unsigned short tmp, mask = 1 << dport->port.line;
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spin_lock_irqsave(&uport->lock, flags);
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tmp = dz_in(dport, DZ_TCR);
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if (break_state)
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tmp |= mask;
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else
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tmp &= ~mask;
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dz_out(dport, DZ_TCR, tmp);
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spin_unlock_irqrestore(&uport->lock, flags);
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}
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static void dz_set_termios(struct uart_port *uport, struct ktermios *termios,
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struct ktermios *old_termios)
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{
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struct dz_port *dport = (struct dz_port *)uport;
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unsigned long flags;
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unsigned int cflag, baud;
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cflag = dport->port.line;
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switch (termios->c_cflag & CSIZE) {
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case CS5:
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cflag |= DZ_CS5;
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break;
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case CS6:
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cflag |= DZ_CS6;
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break;
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case CS7:
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cflag |= DZ_CS7;
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break;
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case CS8:
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default:
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cflag |= DZ_CS8;
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}
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if (termios->c_cflag & CSTOPB)
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cflag |= DZ_CSTOPB;
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if (termios->c_cflag & PARENB)
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cflag |= DZ_PARENB;
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if (termios->c_cflag & PARODD)
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cflag |= DZ_PARODD;
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baud = uart_get_baud_rate(uport, termios, old_termios, 50, 9600);
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switch (baud) {
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case 50:
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cflag |= DZ_B50;
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break;
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case 75:
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cflag |= DZ_B75;
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break;
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case 110:
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cflag |= DZ_B110;
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break;
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case 134:
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cflag |= DZ_B134;
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break;
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case 150:
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cflag |= DZ_B150;
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break;
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case 300:
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cflag |= DZ_B300;
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break;
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case 600:
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cflag |= DZ_B600;
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break;
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case 1200:
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cflag |= DZ_B1200;
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break;
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case 1800:
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cflag |= DZ_B1800;
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break;
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case 2000:
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cflag |= DZ_B2000;
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break;
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case 2400:
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cflag |= DZ_B2400;
|
|
break;
|
|
case 3600:
|
|
cflag |= DZ_B3600;
|
|
break;
|
|
case 4800:
|
|
cflag |= DZ_B4800;
|
|
break;
|
|
case 7200:
|
|
cflag |= DZ_B7200;
|
|
break;
|
|
case 9600:
|
|
default:
|
|
cflag |= DZ_B9600;
|
|
}
|
|
|
|
if (termios->c_cflag & CREAD)
|
|
cflag |= DZ_RXENAB;
|
|
|
|
spin_lock_irqsave(&dport->port.lock, flags);
|
|
|
|
dz_out(dport, DZ_LPR, cflag | dport->port.line);
|
|
dport->cflag = cflag;
|
|
|
|
/* setup accept flag */
|
|
dport->port.read_status_mask = DZ_OERR;
|
|
if (termios->c_iflag & INPCK)
|
|
dport->port.read_status_mask |= DZ_FERR | DZ_PERR;
|
|
|
|
/* characters to ignore */
|
|
uport->ignore_status_mask = 0;
|
|
if (termios->c_iflag & IGNPAR)
|
|
dport->port.ignore_status_mask |= DZ_FERR | DZ_PERR;
|
|
|
|
spin_unlock_irqrestore(&dport->port.lock, flags);
|
|
}
|
|
|
|
static const char *dz_type(struct uart_port *port)
|
|
{
|
|
return "DZ";
|
|
}
|
|
|
|
static void dz_release_port(struct uart_port *port)
|
|
{
|
|
/* nothing to do */
|
|
}
|
|
|
|
static int dz_request_port(struct uart_port *port)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static void dz_config_port(struct uart_port *port, int flags)
|
|
{
|
|
if (flags & UART_CONFIG_TYPE)
|
|
port->type = PORT_DZ;
|
|
}
|
|
|
|
/*
|
|
* verify the new serial_struct (for TIOCSSERIAL).
|
|
*/
|
|
static int dz_verify_port(struct uart_port *port, struct serial_struct *ser)
|
|
{
|
|
int ret = 0;
|
|
if (ser->type != PORT_UNKNOWN && ser->type != PORT_DZ)
|
|
ret = -EINVAL;
|
|
if (ser->irq != port->irq)
|
|
ret = -EINVAL;
|
|
return ret;
|
|
}
|
|
|
|
static struct uart_ops dz_ops = {
|
|
.tx_empty = dz_tx_empty,
|
|
.get_mctrl = dz_get_mctrl,
|
|
.set_mctrl = dz_set_mctrl,
|
|
.stop_tx = dz_stop_tx,
|
|
.start_tx = dz_start_tx,
|
|
.stop_rx = dz_stop_rx,
|
|
.enable_ms = dz_enable_ms,
|
|
.break_ctl = dz_break_ctl,
|
|
.startup = dz_startup,
|
|
.shutdown = dz_shutdown,
|
|
.set_termios = dz_set_termios,
|
|
.type = dz_type,
|
|
.release_port = dz_release_port,
|
|
.request_port = dz_request_port,
|
|
.config_port = dz_config_port,
|
|
.verify_port = dz_verify_port,
|
|
};
|
|
|
|
static void __init dz_init_ports(void)
|
|
{
|
|
static int first = 1;
|
|
struct dz_port *dport;
|
|
unsigned long base;
|
|
int i;
|
|
|
|
if (!first)
|
|
return;
|
|
first = 0;
|
|
|
|
if (mips_machtype == MACH_DS23100 ||
|
|
mips_machtype == MACH_DS5100)
|
|
base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_DZ11);
|
|
else
|
|
base = CKSEG1ADDR(KN02_SLOT_BASE + KN02_DZ11);
|
|
|
|
for (i = 0, dport = dz_ports; i < DZ_NB_PORT; i++, dport++) {
|
|
spin_lock_init(&dport->port.lock);
|
|
dport->port.membase = (char *) base;
|
|
dport->port.iotype = UPIO_MEM;
|
|
dport->port.irq = dec_interrupt[DEC_IRQ_DZ11];
|
|
dport->port.line = i;
|
|
dport->port.fifosize = 1;
|
|
dport->port.ops = &dz_ops;
|
|
dport->port.flags = UPF_BOOT_AUTOCONF;
|
|
}
|
|
}
|
|
|
|
static void dz_reset(struct dz_port *dport)
|
|
{
|
|
dz_out(dport, DZ_CSR, DZ_CLR);
|
|
while (dz_in(dport, DZ_CSR) & DZ_CLR);
|
|
iob();
|
|
|
|
/* enable scanning */
|
|
dz_out(dport, DZ_CSR, DZ_MSE);
|
|
}
|
|
|
|
#ifdef CONFIG_SERIAL_DZ_CONSOLE
|
|
/*
|
|
* -------------------------------------------------------------------
|
|
* dz_console_putchar() -- transmit a character
|
|
*
|
|
* Polled transmission. This is tricky. We need to mask transmit
|
|
* interrupts so that they do not interfere, enable the transmitter
|
|
* for the line requested and then wait till the transmit scanner
|
|
* requests data for this line. But it may request data for another
|
|
* line first, in which case we have to disable its transmitter and
|
|
* repeat waiting till our line pops up. Only then the character may
|
|
* be transmitted. Finally, the state of the transmitter mask is
|
|
* restored. Welcome to the world of PDP-11!
|
|
* -------------------------------------------------------------------
|
|
*/
|
|
static void dz_console_putchar(struct uart_port *uport, int ch)
|
|
{
|
|
struct dz_port *dport = (struct dz_port *)uport;
|
|
unsigned long flags;
|
|
unsigned short csr, tcr, trdy, mask;
|
|
int loops = 10000;
|
|
|
|
spin_lock_irqsave(&dport->port.lock, flags);
|
|
csr = dz_in(dport, DZ_CSR);
|
|
dz_out(dport, DZ_CSR, csr & ~DZ_TIE);
|
|
tcr = dz_in(dport, DZ_TCR);
|
|
tcr |= 1 << dport->port.line;
|
|
mask = tcr;
|
|
dz_out(dport, DZ_TCR, mask);
|
|
iob();
|
|
spin_unlock_irqrestore(&dport->port.lock, flags);
|
|
|
|
while (loops--) {
|
|
trdy = dz_in(dport, DZ_CSR);
|
|
if (!(trdy & DZ_TRDY))
|
|
continue;
|
|
trdy = (trdy & DZ_TLINE) >> 8;
|
|
if (trdy == dport->port.line)
|
|
break;
|
|
mask &= ~(1 << trdy);
|
|
dz_out(dport, DZ_TCR, mask);
|
|
iob();
|
|
udelay(2);
|
|
}
|
|
|
|
if (loops) /* Cannot send otherwise. */
|
|
dz_out(dport, DZ_TDR, ch);
|
|
|
|
dz_out(dport, DZ_TCR, tcr);
|
|
dz_out(dport, DZ_CSR, csr);
|
|
}
|
|
|
|
/*
|
|
* -------------------------------------------------------------------
|
|
* dz_console_print ()
|
|
*
|
|
* dz_console_print is registered for printk.
|
|
* The console must be locked when we get here.
|
|
* -------------------------------------------------------------------
|
|
*/
|
|
static void dz_console_print(struct console *co,
|
|
const char *str,
|
|
unsigned int count)
|
|
{
|
|
struct dz_port *dport = &dz_ports[co->index];
|
|
#ifdef DEBUG_DZ
|
|
prom_printf((char *) str);
|
|
#endif
|
|
uart_console_write(&dport->port, str, count, dz_console_putchar);
|
|
}
|
|
|
|
static int __init dz_console_setup(struct console *co, char *options)
|
|
{
|
|
struct dz_port *dport = &dz_ports[co->index];
|
|
int baud = 9600;
|
|
int bits = 8;
|
|
int parity = 'n';
|
|
int flow = 'n';
|
|
|
|
if (options)
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
|
|
dz_reset(dport);
|
|
|
|
return uart_set_options(&dport->port, co, baud, parity, bits, flow);
|
|
}
|
|
|
|
static struct uart_driver dz_reg;
|
|
static struct console dz_sercons = {
|
|
.name = "ttyS",
|
|
.write = dz_console_print,
|
|
.device = uart_console_device,
|
|
.setup = dz_console_setup,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = -1,
|
|
.data = &dz_reg,
|
|
};
|
|
|
|
static int __init dz_serial_console_init(void)
|
|
{
|
|
if (!IOASIC) {
|
|
dz_init_ports();
|
|
register_console(&dz_sercons);
|
|
return 0;
|
|
} else
|
|
return -ENXIO;
|
|
}
|
|
|
|
console_initcall(dz_serial_console_init);
|
|
|
|
#define SERIAL_DZ_CONSOLE &dz_sercons
|
|
#else
|
|
#define SERIAL_DZ_CONSOLE NULL
|
|
#endif /* CONFIG_SERIAL_DZ_CONSOLE */
|
|
|
|
static struct uart_driver dz_reg = {
|
|
.owner = THIS_MODULE,
|
|
.driver_name = "serial",
|
|
.dev_name = "ttyS",
|
|
.major = TTY_MAJOR,
|
|
.minor = 64,
|
|
.nr = DZ_NB_PORT,
|
|
.cons = SERIAL_DZ_CONSOLE,
|
|
};
|
|
|
|
static int __init dz_init(void)
|
|
{
|
|
int ret, i;
|
|
|
|
if (IOASIC)
|
|
return -ENXIO;
|
|
|
|
printk("%s%s\n", dz_name, dz_version);
|
|
|
|
dz_init_ports();
|
|
|
|
#ifndef CONFIG_SERIAL_DZ_CONSOLE
|
|
/* reset the chip */
|
|
dz_reset(&dz_ports[0]);
|
|
#endif
|
|
|
|
if (request_irq(dz_ports[0].port.irq, dz_interrupt,
|
|
IRQF_DISABLED, "DZ", &dz_ports[0]))
|
|
panic("Unable to register DZ interrupt");
|
|
|
|
ret = uart_register_driver(&dz_reg);
|
|
if (ret != 0)
|
|
return ret;
|
|
|
|
for (i = 0; i < DZ_NB_PORT; i++)
|
|
uart_add_one_port(&dz_reg, &dz_ports[i].port);
|
|
|
|
return ret;
|
|
}
|
|
|
|
module_init(dz_init);
|
|
|
|
MODULE_DESCRIPTION("DECstation DZ serial driver");
|
|
MODULE_LICENSE("GPL");
|