Linus Torvalds 5a61b7a296 RISC-V Fixes for 5.14-rc8 (or 5.14) ... * A pair of device tree updates for the Microsemi Polarfire development kit that fix some mismatches between the u-boot and Linux enternet entries. * A fix to ensure that the F register state is correctly reflected in core dumps. -----BEGIN PGP SIGNATURE----- iQJHBAABCgAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmEpBvITHHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYiRHDD/0Y+pcFyZ2k2blv9xBAVKF5QiqKWfmd +YRdtCEap3qeqcfbG4ZTra4SZuPCXBCgo6lPFib72Kw3kQgl7ubOjh+KlHZ3ng6s lxEQw5nRGjxJF1AcrUd6mHGanHmoz8heoTMBTAS/UB33960ijdWVlDSLm1x+7Kzo sm4h4wDvmNSBMSa+mg/uy2rVPopNfucO/zdLd9oD9HeZHLwFITPtl5AKMMji6Qcv tPHZcc+ZjKXbUP4I7t4tpXB753+4t1Hvw6YAxo6Jv2JrXzGefSMX4wwaYpXFSpqo 7NPbTYL8+kJgEQmRrpnICgFaGjZTN5bgtOucCtUY6PdztLXimSqzlIzFH+uJVulm BIwmhEHnwcTeR93/1HH2P727skdhb5RsE1SawLVf/Yo7LCR8sXzQ3ijAH7aO0IQo tcviBERoY3oL+x01qRK1Lkvq6+PYzsyslBwmdql5FFnCjgEFpBrYT9ruY/aAoMs9 JLT5JeRPfevCExppkA8kaYxWeew3B4f8hUttj2bG9LMQRGZXJugGITy5Lne05BQm cEHwb11FrZwKOe5Uuk19JbkBOFmQbE7mtfl8dFKEa7wgAVgcWGWAg21Nl5ltOFu+ 2emM6uK+prGRe/Qkpp0AHhUiPosQM54n4sIiYPmCAvW9ujNHFtRdgjNW9IsaQKZR K0Ty2B30VkdQfA== =Vqsz -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-5.14-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Palmer Dabbelt: - device tree updates for the Microsemi Polarfire development kit that fix some mismatches between the u-boot and Linux enternet entries - ensure that the F register state is correctly reflected in core dumps * tag 'riscv-for-linus-5.14-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: dts: microchip: Add ethernet0 to the aliases node riscv: dts: microchip: Use 'local-mac-address' for emac1 riscv: Ensure the value of FP registers in the core dump file is up to date		2021-08-27 11:04:57 -07:00
..
boot	riscv: dts: microchip: Add ethernet0 to the aliases node	2021-08-24 20:57:32 -07:00
configs	RISC-V: Enable Microchip PolarFire ICICLE SoC	2021-04-26 08:31:32 -07:00
errata	riscv: skip errata_cip_453.o if CONFIG_ERRATA_SIFIVE_CIP_453 is disabled	2021-06-01 21:16:41 -07:00
include	riscv: Get rid of CONFIG_PHYS_RAM_BASE in kernel physical address conversion	2021-08-06 22:41:28 -07:00
kernel	riscv: Ensure the value of FP registers in the core dump file is up to date	2021-08-24 20:54:10 -07:00
lib	riscv: __asm_copy_to-from_user: Fix: Typos in comments	2021-07-23 17:49:12 -07:00
mm	riscv: Fix comment regarding kernel mapping overlapping with IS_ERR_VALUE	2021-08-12 07:16:58 -07:00
net	bpf: Introduce BPF nospec instruction for mitigating Spectre v4	2021-07-29 00:20:56 +02:00
Kbuild	riscv: Allow device trees to be built into the kernel	2020-05-18 11:38:05 -07:00
Kconfig	Revert "riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED"	2021-08-06 22:41:39 -07:00
Kconfig.debug	RISC-V: Remove EARLY_PRINTK support	2018-12-17 10:23:46 -08:00
Kconfig.erratas	riscv: enable SiFive errata CIP-453 and CIP-1200 Kconfig only if CONFIG_64BIT=y	2021-05-06 09:40:13 -07:00
Kconfig.socs	riscv: sifive: fix Kconfig errata warning	2021-06-12 17:20:50 -07:00
Makefile	Kbuild updates for v5.14	2021-07-10 11:01:38 -07:00