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https://github.com/edk2-porting/linux-next.git
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b2fb7f55a1
Removes embedded log functions and makes use of the DVB math functions to provide SNR in dB. The changes are modeled after recent changes made to the LGDT330x frontends in lgdt330x.c Signed-off-by: Rusty Scott <rustys@ieee.org> Signed-off-by: Trent Piepho <xyzzy@speakeasy.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
683 lines
18 KiB
C
683 lines
18 KiB
C
/*
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* Support for OR51132 (pcHDTV HD-3000) - VSB/QAM
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*
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* Copyright (C) 2005 Kirk Lapray <kirk_lapray@bigfoot.com>
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*
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* Based on code from Jack Kelliher (kelliher@xmission.com)
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* Copyright (C) 2002 & pcHDTV, inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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/*
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* This driver needs two external firmware files. Please copy
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* "dvb-fe-or51132-vsb.fw" and "dvb-fe-or51132-qam.fw" to
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* /usr/lib/hotplug/firmware/ or /lib/firmware/
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* (depending on configuration of firmware hotplug).
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*/
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#define OR51132_VSB_FIRMWARE "dvb-fe-or51132-vsb.fw"
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#define OR51132_QAM_FIRMWARE "dvb-fe-or51132-qam.fw"
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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#include <asm/byteorder.h>
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#include "dvb_math.h"
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#include "dvb_frontend.h"
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#include "dvb-pll.h"
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#include "or51132.h"
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static int debug;
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#define dprintk(args...) \
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do { \
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if (debug) printk(KERN_DEBUG "or51132: " args); \
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} while (0)
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struct or51132_state
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{
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struct i2c_adapter* i2c;
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/* Configuration settings */
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const struct or51132_config* config;
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struct dvb_frontend frontend;
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/* Demodulator private data */
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fe_modulation_t current_modulation;
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u32 snr; /* Result of last SNR calculation */
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/* Tuner private data */
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u32 current_frequency;
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};
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static int i2c_writebytes (struct or51132_state* state, u8 reg, u8 *buf, int len)
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{
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int err;
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struct i2c_msg msg;
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msg.addr = reg;
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msg.flags = 0;
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msg.len = len;
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msg.buf = buf;
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if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
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printk(KERN_WARNING "or51132: i2c_writebytes error (addr %02x, err == %i)\n", reg, err);
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return -EREMOTEIO;
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}
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return 0;
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}
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static u8 i2c_readbytes (struct or51132_state* state, u8 reg, u8* buf, int len)
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{
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int err;
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struct i2c_msg msg;
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msg.addr = reg;
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msg.flags = I2C_M_RD;
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msg.len = len;
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msg.buf = buf;
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if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
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printk(KERN_WARNING "or51132: i2c_readbytes error (addr %02x, err == %i)\n", reg, err);
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return -EREMOTEIO;
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}
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return 0;
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}
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static int or51132_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
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{
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struct or51132_state* state = fe->demodulator_priv;
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static u8 run_buf[] = {0x7F,0x01};
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u8 rec_buf[8];
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u8 cmd_buf[3];
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u32 firmwareAsize, firmwareBsize;
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int i,ret;
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dprintk("Firmware is %Zd bytes\n",fw->size);
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/* Get size of firmware A and B */
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firmwareAsize = le32_to_cpu(*((u32*)fw->data));
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dprintk("FirmwareA is %i bytes\n",firmwareAsize);
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firmwareBsize = le32_to_cpu(*((u32*)(fw->data+4)));
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dprintk("FirmwareB is %i bytes\n",firmwareBsize);
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/* Upload firmware */
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if ((ret = i2c_writebytes(state,state->config->demod_address,
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&fw->data[8],firmwareAsize))) {
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printk(KERN_WARNING "or51132: load_firmware error 1\n");
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return ret;
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}
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msleep(1); /* 1ms */
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if ((ret = i2c_writebytes(state,state->config->demod_address,
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&fw->data[8+firmwareAsize],firmwareBsize))) {
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printk(KERN_WARNING "or51132: load_firmware error 2\n");
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return ret;
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}
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msleep(1); /* 1ms */
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if ((ret = i2c_writebytes(state,state->config->demod_address,
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run_buf,2))) {
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printk(KERN_WARNING "or51132: load_firmware error 3\n");
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return ret;
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}
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/* Wait at least 5 msec */
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msleep(20); /* 10ms */
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if ((ret = i2c_writebytes(state,state->config->demod_address,
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run_buf,2))) {
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printk(KERN_WARNING "or51132: load_firmware error 4\n");
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return ret;
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}
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/* 50ms for operation to begin */
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msleep(50);
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/* Read back ucode version to besure we loaded correctly and are really up and running */
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/* Get uCode version */
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cmd_buf[0] = 0x10;
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cmd_buf[1] = 0x10;
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cmd_buf[2] = 0x00;
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msleep(20); /* 20ms */
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if ((ret = i2c_writebytes(state,state->config->demod_address,
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cmd_buf,3))) {
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printk(KERN_WARNING "or51132: load_firmware error a\n");
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return ret;
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}
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cmd_buf[0] = 0x04;
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cmd_buf[1] = 0x17;
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msleep(20); /* 20ms */
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if ((ret = i2c_writebytes(state,state->config->demod_address,
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cmd_buf,2))) {
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printk(KERN_WARNING "or51132: load_firmware error b\n");
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return ret;
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}
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cmd_buf[0] = 0x00;
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cmd_buf[1] = 0x00;
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msleep(20); /* 20ms */
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if ((ret = i2c_writebytes(state,state->config->demod_address,
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cmd_buf,2))) {
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printk(KERN_WARNING "or51132: load_firmware error c\n");
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return ret;
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}
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for(i=0;i<4;i++) {
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msleep(20); /* 20ms */
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/* Once upon a time, this command might have had something
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to do with getting the firmware version, but it's
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not used anymore:
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{0x04,0x00,0x30,0x00,i+1} */
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/* Read 8 bytes, two bytes at a time */
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if ((ret = i2c_readbytes(state,state->config->demod_address,
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&rec_buf[i*2],2))) {
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printk(KERN_WARNING
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"or51132: load_firmware error d - %d\n",i);
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return ret;
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}
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}
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printk(KERN_WARNING
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"or51132: Version: %02X%02X%02X%02X-%02X%02X%02X%02X (%02X%01X-%01X-%02X%01X-%01X)\n",
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rec_buf[1],rec_buf[0],rec_buf[3],rec_buf[2],
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rec_buf[5],rec_buf[4],rec_buf[7],rec_buf[6],
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rec_buf[3],rec_buf[2]>>4,rec_buf[2]&0x0f,
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rec_buf[5],rec_buf[4]>>4,rec_buf[4]&0x0f);
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cmd_buf[0] = 0x10;
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cmd_buf[1] = 0x00;
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cmd_buf[2] = 0x00;
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msleep(20); /* 20ms */
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if ((ret = i2c_writebytes(state,state->config->demod_address,
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cmd_buf,3))) {
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printk(KERN_WARNING "or51132: load_firmware error e\n");
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return ret;
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}
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return 0;
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};
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static int or51132_init(struct dvb_frontend* fe)
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{
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return 0;
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}
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static int or51132_read_ber(struct dvb_frontend* fe, u32* ber)
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{
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*ber = 0;
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return 0;
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}
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static int or51132_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
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{
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*ucblocks = 0;
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return 0;
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}
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static int or51132_sleep(struct dvb_frontend* fe)
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{
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return 0;
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}
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static int or51132_setmode(struct dvb_frontend* fe)
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{
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struct or51132_state* state = fe->demodulator_priv;
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unsigned char cmd_buf[3];
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dprintk("setmode %d\n",(int)state->current_modulation);
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/* set operation mode in Receiver 1 register; */
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cmd_buf[0] = 0x04;
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cmd_buf[1] = 0x01;
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switch (state->current_modulation) {
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case QAM_256:
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case QAM_64:
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case QAM_AUTO:
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/* Auto-deinterleave; MPEG ser, MPEG2tr, phase noise-high*/
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cmd_buf[2] = 0x5F;
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break;
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case VSB_8:
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/* Auto CH, Auto NTSC rej, MPEGser, MPEG2tr, phase noise-high*/
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cmd_buf[2] = 0x50;
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break;
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default:
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printk("setmode:Modulation set to unsupported value\n");
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};
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if (i2c_writebytes(state,state->config->demod_address,
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cmd_buf,3)) {
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printk(KERN_WARNING "or51132: set_mode error 1\n");
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return -1;
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}
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dprintk("or51132: set #1 to %02x\n", cmd_buf[2]);
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/* Set operation mode in Receiver 6 register */
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cmd_buf[0] = 0x1C;
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switch (state->current_modulation) {
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case QAM_AUTO:
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/* REC MODE Normal Carrier Lock */
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cmd_buf[1] = 0x00;
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/* Channel MODE Auto QAM64/256 */
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cmd_buf[2] = 0x4f;
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break;
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case QAM_256:
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/* REC MODE Normal Carrier Lock */
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cmd_buf[1] = 0x00;
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/* Channel MODE QAM256 */
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cmd_buf[2] = 0x45;
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break;
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case QAM_64:
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/* REC MODE Normal Carrier Lock */
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cmd_buf[1] = 0x00;
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/* Channel MODE QAM64 */
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cmd_buf[2] = 0x43;
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break;
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case VSB_8:
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/* REC MODE inv IF spectrum, Normal */
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cmd_buf[1] = 0x03;
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/* Channel MODE ATSC/VSB8 */
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cmd_buf[2] = 0x06;
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break;
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default:
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printk("setmode: Modulation set to unsupported value\n");
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};
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msleep(20); /* 20ms */
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if (i2c_writebytes(state,state->config->demod_address,
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cmd_buf,3)) {
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printk(KERN_WARNING "or51132: set_mode error 2\n");
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return -1;
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}
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dprintk("or51132: set #6 to 0x%02x%02x\n", cmd_buf[1], cmd_buf[2]);
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return 0;
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}
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/* Some modulations use the same firmware. This classifies modulations
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by the firmware they use. */
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#define MOD_FWCLASS_UNKNOWN 0
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#define MOD_FWCLASS_VSB 1
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#define MOD_FWCLASS_QAM 2
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static int modulation_fw_class(fe_modulation_t modulation)
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{
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switch(modulation) {
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case VSB_8:
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return MOD_FWCLASS_VSB;
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case QAM_AUTO:
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case QAM_64:
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case QAM_256:
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return MOD_FWCLASS_QAM;
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default:
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return MOD_FWCLASS_UNKNOWN;
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}
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}
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static int or51132_set_parameters(struct dvb_frontend* fe,
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struct dvb_frontend_parameters *param)
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{
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int ret;
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struct or51132_state* state = fe->demodulator_priv;
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const struct firmware *fw;
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const char *fwname;
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int clock_mode;
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/* Upload new firmware only if we need a different one */
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if (modulation_fw_class(state->current_modulation) !=
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modulation_fw_class(param->u.vsb.modulation)) {
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switch(modulation_fw_class(param->u.vsb.modulation)) {
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case MOD_FWCLASS_VSB:
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dprintk("set_parameters VSB MODE\n");
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fwname = OR51132_VSB_FIRMWARE;
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/* Set non-punctured clock for VSB */
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clock_mode = 0;
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break;
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case MOD_FWCLASS_QAM:
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dprintk("set_parameters QAM MODE\n");
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fwname = OR51132_QAM_FIRMWARE;
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/* Set punctured clock for QAM */
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clock_mode = 1;
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break;
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default:
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printk("or51132: Modulation type(%d) UNSUPPORTED\n",
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param->u.vsb.modulation);
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return -1;
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}
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printk("or51132: Waiting for firmware upload(%s)...\n",
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fwname);
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ret = request_firmware(&fw, fwname, &state->i2c->dev);
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if (ret) {
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printk(KERN_WARNING "or51132: No firmware up"
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"loaded(timeout or file not found?)\n");
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return ret;
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}
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ret = or51132_load_firmware(fe, fw);
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release_firmware(fw);
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if (ret) {
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printk(KERN_WARNING "or51132: Writing firmware to "
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"device failed!\n");
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return ret;
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}
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printk("or51132: Firmware upload complete.\n");
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state->config->set_ts_params(fe, clock_mode);
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}
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/* Change only if we are actually changing the modulation */
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if (state->current_modulation != param->u.vsb.modulation) {
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state->current_modulation = param->u.vsb.modulation;
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or51132_setmode(fe);
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}
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if (fe->ops.tuner_ops.set_params) {
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fe->ops.tuner_ops.set_params(fe, param);
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if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
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}
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/* Set to current mode */
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or51132_setmode(fe);
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/* Update current frequency */
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state->current_frequency = param->frequency;
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return 0;
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}
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static int or51132_get_parameters(struct dvb_frontend* fe,
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struct dvb_frontend_parameters *param)
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{
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struct or51132_state* state = fe->demodulator_priv;
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u8 buf[2];
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/* Receiver Status */
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buf[0]=0x04;
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buf[1]=0x00;
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msleep(30); /* 30ms */
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if (i2c_writebytes(state,state->config->demod_address,buf,2)) {
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printk(KERN_WARNING "or51132: get_parameters write error\n");
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return -EREMOTEIO;
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}
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msleep(30); /* 30ms */
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if (i2c_readbytes(state,state->config->demod_address,buf,2)) {
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printk(KERN_WARNING "or51132: get_parameters read error\n");
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return -EREMOTEIO;
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}
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switch(buf[0]) {
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case 0x06: param->u.vsb.modulation = VSB_8; break;
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case 0x43: param->u.vsb.modulation = QAM_64; break;
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case 0x45: param->u.vsb.modulation = QAM_256; break;
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default:
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printk(KERN_WARNING "or51132: unknown status 0x%02x\n",
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buf[0]);
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return -EREMOTEIO;
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}
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/* FIXME: Read frequency from frontend, take AFC into account */
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param->frequency = state->current_frequency;
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/* FIXME: How to read inversion setting? Receiver 6 register? */
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param->inversion = INVERSION_AUTO;
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return 0;
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}
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static int or51132_read_status(struct dvb_frontend* fe, fe_status_t* status)
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{
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struct or51132_state* state = fe->demodulator_priv;
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unsigned char rec_buf[2];
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unsigned char snd_buf[2];
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*status = 0;
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/* Receiver Status */
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snd_buf[0]=0x04;
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snd_buf[1]=0x00;
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msleep(30); /* 30ms */
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if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
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printk(KERN_WARNING "or51132: read_status write error\n");
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return -1;
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}
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msleep(30); /* 30ms */
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if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
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printk(KERN_WARNING "or51132: read_status read error\n");
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return -1;
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}
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dprintk("read_status %x %x\n",rec_buf[0],rec_buf[1]);
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if (rec_buf[1] & 0x01) { /* Receiver Lock */
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*status |= FE_HAS_SIGNAL;
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*status |= FE_HAS_CARRIER;
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*status |= FE_HAS_VITERBI;
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*status |= FE_HAS_SYNC;
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*status |= FE_HAS_LOCK;
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}
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return 0;
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}
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/* Calculate SNR estimation (scaled by 2^24)
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8-VSB SNR and QAM equations from Oren datasheets
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For 8-VSB:
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SNR[dB] = 10 * log10(897152044.8282 / MSE^2 ) - K
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Where K = 0 if NTSC rejection filter is OFF; and
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K = 3 if NTSC rejection filter is ON
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For QAM64:
|
|
SNR[dB] = 10 * log10(897152044.8282 / MSE^2 )
|
|
|
|
For QAM256:
|
|
SNR[dB] = 10 * log10(907832426.314266 / MSE^2 )
|
|
|
|
We re-write the snr equation as:
|
|
SNR * 2^24 = 10*(c - 2*intlog10(MSE))
|
|
Where for QAM256, c = log10(907832426.314266) * 2^24
|
|
and for 8-VSB and QAM64, c = log10(897152044.8282) * 2^24 */
|
|
|
|
static u32 calculate_snr(u32 mse, u32 c)
|
|
{
|
|
if (mse == 0) /* No signal */
|
|
return 0;
|
|
|
|
mse = 2*intlog10(mse);
|
|
if (mse > c) {
|
|
/* Negative SNR, which is possible, but realisticly the
|
|
demod will lose lock before the signal gets this bad. The
|
|
API only allows for unsigned values, so just return 0 */
|
|
return 0;
|
|
}
|
|
return 10*(c - mse);
|
|
}
|
|
|
|
static int or51132_read_snr(struct dvb_frontend* fe, u16* snr)
|
|
{
|
|
struct or51132_state* state = fe->demodulator_priv;
|
|
u8 rec_buf[2];
|
|
u8 snd_buf[2];
|
|
u32 noise;
|
|
u32 c;
|
|
u32 usK;
|
|
|
|
/* Register is same for VSB or QAM firmware */
|
|
snd_buf[0]=0x04;
|
|
snd_buf[1]=0x02; /* SNR after Equalizer */
|
|
msleep(30); /* 30ms */
|
|
if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
|
|
printk(KERN_WARNING "or51132: snr write error\n");
|
|
return -EREMOTEIO;
|
|
}
|
|
msleep(30); /* 30ms */
|
|
if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
|
|
printk(KERN_WARNING "or51132: snr read error\n");
|
|
return -EREMOTEIO;
|
|
}
|
|
noise = rec_buf[0] | (rec_buf[1] << 8);
|
|
dprintk("read_snr noise %x %x (%i)\n",rec_buf[0],rec_buf[1],noise);
|
|
|
|
/* Read status, contains modulation type for QAM_AUTO and
|
|
NTSC filter for VSB */
|
|
snd_buf[0]=0x04;
|
|
snd_buf[1]=0x00; /* Status register */
|
|
msleep(30); /* 30ms */
|
|
if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
|
|
printk(KERN_WARNING "or51132: status write error\n");
|
|
return -EREMOTEIO;
|
|
}
|
|
msleep(30); /* 30ms */
|
|
if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
|
|
printk(KERN_WARNING "or51132: status read error\n");
|
|
return -EREMOTEIO;
|
|
}
|
|
|
|
usK = 0;
|
|
switch (rec_buf[0]) {
|
|
case 0x06:
|
|
usK = (rec_buf[1] & 0x10) ? 0x03000000 : 0;
|
|
/* Fall through to QAM64 case */
|
|
case 0x43:
|
|
c = 150204167;
|
|
break;
|
|
case 0x45:
|
|
c = 150290396;
|
|
break;
|
|
default:
|
|
printk(KERN_ERR "or51132: unknown status 0x%02x\n", rec_buf[0]);
|
|
return -EREMOTEIO;
|
|
}
|
|
dprintk("%s: modulation %02x, NTSC rej O%s\n", __FUNCTION__,
|
|
rec_buf[0], rec_buf[1]&0x10?"n":"ff");
|
|
|
|
/* Calculate SNR using noise, c, and NTSC rejection correction */
|
|
state->snr = calculate_snr(noise, c) - usK;
|
|
*snr = (state->snr) >> 16;
|
|
|
|
dprintk("%s: noise = 0x%08x, snr = %d.%02d dB\n", __FUNCTION__, noise,
|
|
state->snr >> 24, (((state->snr>>8) & 0xffff) * 100) >> 16);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength)
|
|
{
|
|
/* Calculate Strength from SNR up to 35dB */
|
|
/* Even though the SNR can go higher than 35dB, there is some comfort */
|
|
/* factor in having a range of strong signals that can show at 100% */
|
|
struct or51132_state* state = (struct or51132_state*) fe->demodulator_priv;
|
|
u16 snr;
|
|
int ret;
|
|
|
|
ret = fe->ops.read_snr(fe, &snr);
|
|
if (ret != 0)
|
|
return ret;
|
|
/* Rather than use the 8.8 value snr, use state->snr which is 8.24 */
|
|
/* scale the range 0 - 35*2^24 into 0 - 65535 */
|
|
if (state->snr >= 8960 * 0x10000)
|
|
*strength = 0xffff;
|
|
else
|
|
*strength = state->snr / 8960;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int or51132_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
|
|
{
|
|
fe_tune_settings->min_delay_ms = 500;
|
|
fe_tune_settings->step_size = 0;
|
|
fe_tune_settings->max_drift = 0;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void or51132_release(struct dvb_frontend* fe)
|
|
{
|
|
struct or51132_state* state = fe->demodulator_priv;
|
|
kfree(state);
|
|
}
|
|
|
|
static struct dvb_frontend_ops or51132_ops;
|
|
|
|
struct dvb_frontend* or51132_attach(const struct or51132_config* config,
|
|
struct i2c_adapter* i2c)
|
|
{
|
|
struct or51132_state* state = NULL;
|
|
|
|
/* Allocate memory for the internal state */
|
|
state = kmalloc(sizeof(struct or51132_state), GFP_KERNEL);
|
|
if (state == NULL)
|
|
goto error;
|
|
|
|
/* Setup the state */
|
|
state->config = config;
|
|
state->i2c = i2c;
|
|
state->current_frequency = -1;
|
|
state->current_modulation = -1;
|
|
|
|
/* Create dvb_frontend */
|
|
memcpy(&state->frontend.ops, &or51132_ops, sizeof(struct dvb_frontend_ops));
|
|
state->frontend.demodulator_priv = state;
|
|
return &state->frontend;
|
|
|
|
error:
|
|
kfree(state);
|
|
return NULL;
|
|
}
|
|
|
|
static struct dvb_frontend_ops or51132_ops = {
|
|
|
|
.info = {
|
|
.name = "Oren OR51132 VSB/QAM Frontend",
|
|
.type = FE_ATSC,
|
|
.frequency_min = 44000000,
|
|
.frequency_max = 958000000,
|
|
.frequency_stepsize = 166666,
|
|
.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
|
|
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
|
|
FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_QAM_AUTO |
|
|
FE_CAN_8VSB
|
|
},
|
|
|
|
.release = or51132_release,
|
|
|
|
.init = or51132_init,
|
|
.sleep = or51132_sleep,
|
|
|
|
.set_frontend = or51132_set_parameters,
|
|
.get_frontend = or51132_get_parameters,
|
|
.get_tune_settings = or51132_get_tune_settings,
|
|
|
|
.read_status = or51132_read_status,
|
|
.read_ber = or51132_read_ber,
|
|
.read_signal_strength = or51132_read_signal_strength,
|
|
.read_snr = or51132_read_snr,
|
|
.read_ucblocks = or51132_read_ucblocks,
|
|
};
|
|
|
|
module_param(debug, int, 0644);
|
|
MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
|
|
|
|
MODULE_DESCRIPTION("OR51132 ATSC [pcHDTV HD-3000] (8VSB & ITU J83 AnnexB FEC QAM64/256) Demodulator Driver");
|
|
MODULE_AUTHOR("Kirk Lapray");
|
|
MODULE_LICENSE("GPL");
|
|
|
|
EXPORT_SYMBOL(or51132_attach);
|
|
|
|
/*
|
|
* Local variables:
|
|
* c-basic-offset: 8
|
|
* End:
|
|
*/
|