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1577ecef76
The MDIO bus drivers for the UCC and gianfar ethernet controllers are essentially the same. There's no reason to duplicate that much code. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
46 lines
1.7 KiB
C
46 lines
1.7 KiB
C
/*
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* Freescale PowerQUICC MDIO Driver -- MII Management Bus Implementation
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* Driver for the MDIO bus controller on Freescale PowerQUICC processors
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*
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* Author: Andy Fleming
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*
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* Copyright (c) 2002-2004,2008 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#ifndef __FSL_PQ_MDIO_H
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#define __FSL_PQ_MDIO_H
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#define MIIMIND_BUSY 0x00000001
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#define MIIMIND_NOTVALID 0x00000004
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#define MIIMCFG_INIT_VALUE 0x00000007
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#define MIIMCFG_RESET 0x80000000
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#define MII_READ_COMMAND 0x00000001
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struct fsl_pq_mdio {
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u32 miimcfg; /* MII management configuration reg */
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u32 miimcom; /* MII management command reg */
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u32 miimadd; /* MII management address reg */
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u32 miimcon; /* MII management control reg */
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u32 miimstat; /* MII management status reg */
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u32 miimind; /* MII management indication reg */
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u8 reserved[28]; /* Space holder */
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u32 utbipar; /* TBI phy address reg (only on UCC) */
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} __attribute__ ((packed));
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int fsl_pq_mdio_read(struct mii_bus *bus, int mii_id, int regnum);
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int fsl_pq_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 value);
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int fsl_pq_local_mdio_write(struct fsl_pq_mdio __iomem *regs, int mii_id,
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int regnum, u16 value);
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int fsl_pq_local_mdio_read(struct fsl_pq_mdio __iomem *regs, int mii_id, int regnum);
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int __init fsl_pq_mdio_init(void);
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void fsl_pq_mdio_exit(void);
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void fsl_pq_mdio_bus_name(char *name, struct device_node *np);
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#endif /* FSL_PQ_MDIO_H */
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