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6a4ccd9a8e
This enables the L2 cache controller available in Amlogic SoCs. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Carlo Caione <carlo@caione.org>
30 lines
878 B
C
30 lines
878 B
C
/*
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* Copyright (C) 2014 Carlo Caione <carlo@caione.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*/
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#include <linux/of_platform.h>
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#include <asm/mach/arch.h>
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static const char * const meson_common_board_compat[] = {
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"amlogic,meson6",
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"amlogic,meson8",
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NULL,
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};
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DT_MACHINE_START(MESON, "Amlogic Meson platform")
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.dt_compat = meson_common_board_compat,
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.l2c_aux_val = 0,
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.l2c_aux_mask = ~0,
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MACHINE_END
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