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16ea0fc98d
This allows parallel scan and the like to be set without having to stop using the existing full helper functions. This patch merely adds the argument and fixes up the callers. It doesn't undo the special cases already in the tree or add any new parallel callers. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
240 lines
6.8 KiB
C
240 lines
6.8 KiB
C
/*
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* pata-cs5535.c - CS5535 PATA for new ATA layer
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* (C) 2005-2006 Red Hat Inc
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* Alan Cox <alan@lxorguk.ukuu.org.uk>
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*
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* based upon cs5535.c from AMD <Jens.Altmann@amd.com> as cleaned up and
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* made readable and Linux style by Wolfgang Zuleger <wolfgang.zuleger@gmx.de>
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* and Alexander Kiausch <alex.kiausch@t-online.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* Loosely based on the piix & svwks drivers.
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*
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* Documentation:
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* Available from AMD web site.
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* TODO
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* Review errata to see if serializing is necessary
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#include <asm/msr.h>
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#define DRV_NAME "cs5535"
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#define DRV_VERSION "0.2.12"
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/*
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* The Geode (Aka Athlon GX now) uses an internal MSR based
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* bus system for control. Demented but there you go.
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*/
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#define MSR_ATAC_BASE 0x51300000
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#define ATAC_GLD_MSR_CAP (MSR_ATAC_BASE+0)
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#define ATAC_GLD_MSR_CONFIG (MSR_ATAC_BASE+0x01)
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#define ATAC_GLD_MSR_SMI (MSR_ATAC_BASE+0x02)
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#define ATAC_GLD_MSR_ERROR (MSR_ATAC_BASE+0x03)
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#define ATAC_GLD_MSR_PM (MSR_ATAC_BASE+0x04)
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#define ATAC_GLD_MSR_DIAG (MSR_ATAC_BASE+0x05)
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#define ATAC_IO_BAR (MSR_ATAC_BASE+0x08)
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#define ATAC_RESET (MSR_ATAC_BASE+0x10)
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#define ATAC_CH0D0_PIO (MSR_ATAC_BASE+0x20)
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#define ATAC_CH0D0_DMA (MSR_ATAC_BASE+0x21)
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#define ATAC_CH0D1_PIO (MSR_ATAC_BASE+0x22)
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#define ATAC_CH0D1_DMA (MSR_ATAC_BASE+0x23)
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#define ATAC_PCI_ABRTERR (MSR_ATAC_BASE+0x24)
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#define ATAC_BM0_CMD_PRIM 0x00
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#define ATAC_BM0_STS_PRIM 0x02
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#define ATAC_BM0_PRD 0x04
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#define CS5535_CABLE_DETECT 0x48
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#define CS5535_BAD_PIO(timings) ( (timings&~0x80000000UL)==0x00009172 )
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/**
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* cs5535_cable_detect - detect cable type
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* @ap: Port to detect on
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*
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* Perform cable detection for ATA66 capable cable. Return a libata
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* cable type.
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*/
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static int cs5535_cable_detect(struct ata_port *ap)
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{
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u8 cable;
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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pci_read_config_byte(pdev, CS5535_CABLE_DETECT, &cable);
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if (cable & 1)
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return ATA_CBL_PATA80;
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else
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return ATA_CBL_PATA40;
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}
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/**
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* cs5535_set_piomode - PIO setup
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* @ap: ATA interface
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* @adev: device on the interface
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*
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* Set our PIO requirements. The CS5535 is pretty clean about all this
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*/
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static void cs5535_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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static const u16 pio_timings[5] = {
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0xF7F4, 0xF173, 0x8141, 0x5131, 0x1131
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};
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static const u16 pio_cmd_timings[5] = {
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0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131
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};
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u32 reg, dummy;
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struct ata_device *pair = ata_dev_pair(adev);
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int mode = adev->pio_mode - XFER_PIO_0;
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int cmdmode = mode;
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/* Command timing has to be for the lowest of the pair of devices */
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if (pair) {
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int pairmode = pair->pio_mode - XFER_PIO_0;
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cmdmode = min(mode, pairmode);
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/* Write the other drive timing register if it changed */
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if (cmdmode < pairmode)
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wrmsr(ATAC_CH0D0_PIO + 2 * pair->devno,
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pio_cmd_timings[cmdmode] << 16 | pio_timings[pairmode], 0);
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}
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/* Write the drive timing register */
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wrmsr(ATAC_CH0D0_PIO + 2 * adev->devno,
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pio_cmd_timings[cmdmode] << 16 | pio_timings[mode], 0);
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/* Set the PIO "format 1" bit in the DMA timing register */
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rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy);
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wrmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg | 0x80000000UL, 0);
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}
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/**
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* cs5535_set_dmamode - DMA timing setup
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* @ap: ATA interface
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* @adev: Device being configured
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*
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*/
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static void cs5535_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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{
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static const u32 udma_timings[5] = {
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0x7F7436A1, 0x7F733481, 0x7F723261, 0x7F713161, 0x7F703061
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};
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static const u32 mwdma_timings[3] = {
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0x7F0FFFF3, 0x7F035352, 0x7F024241
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};
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u32 reg, dummy;
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int mode = adev->dma_mode;
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rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy);
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reg &= 0x80000000UL;
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if (mode >= XFER_UDMA_0)
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reg |= udma_timings[mode - XFER_UDMA_0];
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else
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reg |= mwdma_timings[mode - XFER_MW_DMA_0];
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wrmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, 0);
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}
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static struct scsi_host_template cs5535_sht = {
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ATA_BMDMA_SHT(DRV_NAME),
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};
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static struct ata_port_operations cs5535_port_ops = {
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.inherits = &ata_bmdma_port_ops,
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.cable_detect = cs5535_cable_detect,
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.set_piomode = cs5535_set_piomode,
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.set_dmamode = cs5535_set_dmamode,
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};
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/**
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* cs5535_init_one - Initialise a CS5530
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* @dev: PCI device
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* @id: Entry in match table
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*
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* Install a driver for the newly found CS5530 companion chip. Most of
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* this is just housekeeping. We have to set the chip up correctly and
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* turn off various bits of emulation magic.
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*/
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static int cs5535_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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{
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static const struct ata_port_info info = {
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.flags = ATA_FLAG_SLAVE_POSS,
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.pio_mask = ATA_PIO4,
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.mwdma_mask = ATA_MWDMA2,
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.udma_mask = ATA_UDMA4,
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.port_ops = &cs5535_port_ops
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};
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const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
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u32 timings, dummy;
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/* Check the BIOS set the initial timing clock. If not set the
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timings for PIO0 */
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rdmsr(ATAC_CH0D0_PIO, timings, dummy);
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if (CS5535_BAD_PIO(timings))
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wrmsr(ATAC_CH0D0_PIO, 0xF7F4F7F4UL, 0);
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rdmsr(ATAC_CH0D1_PIO, timings, dummy);
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if (CS5535_BAD_PIO(timings))
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wrmsr(ATAC_CH0D1_PIO, 0xF7F4F7F4UL, 0);
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return ata_pci_sff_init_one(dev, ppi, &cs5535_sht, NULL, 0);
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}
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static const struct pci_device_id cs5535[] = {
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{ PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_CS5535_IDE), },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5535_IDE), },
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{ },
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};
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static struct pci_driver cs5535_pci_driver = {
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.name = DRV_NAME,
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.id_table = cs5535,
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.probe = cs5535_init_one,
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.remove = ata_pci_remove_one,
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#ifdef CONFIG_PM
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.suspend = ata_pci_device_suspend,
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.resume = ata_pci_device_resume,
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#endif
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};
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static int __init cs5535_init(void)
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{
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return pci_register_driver(&cs5535_pci_driver);
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}
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static void __exit cs5535_exit(void)
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{
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pci_unregister_driver(&cs5535_pci_driver);
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}
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MODULE_AUTHOR("Alan Cox, Jens Altmann, Wolfgan Zuleger, Alexander Kiausch");
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MODULE_DESCRIPTION("low-level driver for the NS/AMD 5530");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(pci, cs5535);
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MODULE_VERSION(DRV_VERSION);
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module_init(cs5535_init);
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module_exit(cs5535_exit);
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