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a9e9c7153e
This adds max1117/max1118/max1119 8-bit, dual-channel ADC driver. This new driver uses the zero length spi_transfers with the cs_change flag set and/or the non-zero delay_usecs. 1. The zero length transfer with the spi_transfer.cs_change set is required in order to select CH1. The chip select line must be brought high and low again without transfer. 2. The zero length transfer with the spi_transfer.delay_usecs > 0 is required for waiting the conversion to be complete. The conversion begins with the falling edge of the chip select. During the conversion process, SCLK is ignored. These two usages are unusual. But the spi controller drivers that use a default implementation of transfer_one_message() are likely to work. (I've tested this adc driver with spi-omap2-mcspi and spi-xilinx) On the other hand, some spi controller drivers that have their own transfer_one_message() may not work. But at least for the zero length transfer with delay_usecs > 0, I'm proposing a new testcase for the spi-loopback-test that can test whether the delay_usecs setting has taken effect. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Jonathan Cameron <jic23@kernel.org> Cc: Hartmut Knaack <knaack.h@gmx.de> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Peter Meerwald-Stadler <pmeerw@pmeerw.net> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mark Brown <broonie@kernel.org> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
308 lines
6.9 KiB
C
308 lines
6.9 KiB
C
/*
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* MAX1117/MAX1118/MAX1119 8-bit, dual-channel ADCs driver
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*
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* Copyright (c) 2017 Akinobu Mita <akinobu.mita@gmail.com>
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*
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* This file is subject to the terms and conditions of version 2 of
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* the GNU General Public License. See the file COPYING in the main
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* directory of this archive for more details.
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*
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* Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX1117-MAX1119.pdf
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*
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* SPI interface connections
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*
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* SPI MAXIM
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* Master Direction MAX1117/8/9
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* ------ --------- -----------
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* nCS --> CNVST
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* SCK --> SCLK
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* MISO <-- DOUT
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* ------ --------- -----------
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*/
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#include <linux/module.h>
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#include <linux/spi/spi.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/triggered_buffer.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/regulator/consumer.h>
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enum max1118_id {
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max1117,
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max1118,
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max1119,
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};
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struct max1118 {
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struct spi_device *spi;
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struct mutex lock;
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struct regulator *reg;
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u8 data ____cacheline_aligned;
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};
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#define MAX1118_CHANNEL(ch) \
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{ \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = (ch), \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
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.scan_index = ch, \
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.scan_type = { \
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.sign = 'u', \
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.realbits = 8, \
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.storagebits = 8, \
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}, \
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}
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static const struct iio_chan_spec max1118_channels[] = {
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MAX1118_CHANNEL(0),
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MAX1118_CHANNEL(1),
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IIO_CHAN_SOFT_TIMESTAMP(2),
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};
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static int max1118_read(struct spi_device *spi, int channel)
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{
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struct iio_dev *indio_dev = spi_get_drvdata(spi);
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struct max1118 *adc = iio_priv(indio_dev);
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struct spi_transfer xfers[] = {
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/*
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* To select CH1 for conversion, CNVST pin must be brought high
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* and low for a second time.
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*/
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{
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.len = 0,
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.delay_usecs = 1, /* > CNVST Low Time 100 ns */
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.cs_change = 1,
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},
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/*
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* The acquisition interval begins with the falling edge of
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* CNVST. The total acquisition and conversion process takes
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* <7.5us.
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*/
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{
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.len = 0,
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.delay_usecs = 8,
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},
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{
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.rx_buf = &adc->data,
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.len = 1,
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},
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};
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int ret;
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if (channel == 0)
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ret = spi_sync_transfer(spi, xfers + 1, 2);
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else
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ret = spi_sync_transfer(spi, xfers, 3);
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if (ret)
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return ret;
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return adc->data;
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}
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static int max1118_get_vref_mV(struct spi_device *spi)
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{
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struct iio_dev *indio_dev = spi_get_drvdata(spi);
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struct max1118 *adc = iio_priv(indio_dev);
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const struct spi_device_id *id = spi_get_device_id(spi);
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int vref_uV;
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switch (id->driver_data) {
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case max1117:
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return 2048;
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case max1119:
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return 4096;
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case max1118:
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vref_uV = regulator_get_voltage(adc->reg);
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if (vref_uV < 0)
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return vref_uV;
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return vref_uV / 1000;
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}
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return -ENODEV;
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}
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static int max1118_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct max1118 *adc = iio_priv(indio_dev);
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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mutex_lock(&adc->lock);
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*val = max1118_read(adc->spi, chan->channel);
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mutex_unlock(&adc->lock);
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if (*val < 0)
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return *val;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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*val = max1118_get_vref_mV(adc->spi);
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if (*val < 0)
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return *val;
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*val2 = 8;
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return IIO_VAL_FRACTIONAL_LOG2;
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}
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return -EINVAL;
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}
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static const struct iio_info max1118_info = {
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.read_raw = max1118_read_raw,
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.driver_module = THIS_MODULE,
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};
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static irqreturn_t max1118_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct max1118 *adc = iio_priv(indio_dev);
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u8 data[16] = { }; /* 2x 8-bit ADC data + padding + 8 bytes timestamp */
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int scan_index;
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int i = 0;
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mutex_lock(&adc->lock);
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for_each_set_bit(scan_index, indio_dev->active_scan_mask,
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indio_dev->masklength) {
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const struct iio_chan_spec *scan_chan =
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&indio_dev->channels[scan_index];
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int ret = max1118_read(adc->spi, scan_chan->channel);
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if (ret < 0) {
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dev_warn(&adc->spi->dev,
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"failed to get conversion data\n");
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goto out;
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}
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data[i] = ret;
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i++;
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}
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iio_push_to_buffers_with_timestamp(indio_dev, data,
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iio_get_time_ns(indio_dev));
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out:
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mutex_unlock(&adc->lock);
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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static int max1118_probe(struct spi_device *spi)
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{
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struct iio_dev *indio_dev;
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struct max1118 *adc;
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const struct spi_device_id *id = spi_get_device_id(spi);
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int ret;
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indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
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if (!indio_dev)
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return -ENOMEM;
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adc = iio_priv(indio_dev);
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adc->spi = spi;
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mutex_init(&adc->lock);
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if (id->driver_data == max1118) {
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adc->reg = devm_regulator_get(&spi->dev, "vref");
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if (IS_ERR(adc->reg)) {
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dev_err(&spi->dev, "failed to get vref regulator\n");
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return PTR_ERR(adc->reg);
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}
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ret = regulator_enable(adc->reg);
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if (ret)
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return ret;
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}
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spi_set_drvdata(spi, indio_dev);
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indio_dev->name = spi_get_device_id(spi)->name;
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indio_dev->dev.parent = &spi->dev;
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indio_dev->info = &max1118_info;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->channels = max1118_channels;
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indio_dev->num_channels = ARRAY_SIZE(max1118_channels);
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/*
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* To reinitiate a conversion on CH0, it is necessary to allow for a
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* conversion to be complete and all of the data to be read out. Once
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* a conversion has been completed, the MAX1117/MAX1118/MAX1119 will go
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* into AutoShutdown mode until the next conversion is initiated.
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*/
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max1118_read(spi, 0);
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ret = iio_triggered_buffer_setup(indio_dev, NULL,
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max1118_trigger_handler, NULL);
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if (ret)
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goto err_reg_disable;
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ret = iio_device_register(indio_dev);
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if (ret)
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goto err_buffer_cleanup;
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return 0;
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err_buffer_cleanup:
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iio_triggered_buffer_cleanup(indio_dev);
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err_reg_disable:
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if (id->driver_data == max1118)
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regulator_disable(adc->reg);
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return ret;
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}
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static int max1118_remove(struct spi_device *spi)
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{
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struct iio_dev *indio_dev = spi_get_drvdata(spi);
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struct max1118 *adc = iio_priv(indio_dev);
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const struct spi_device_id *id = spi_get_device_id(spi);
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iio_device_unregister(indio_dev);
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iio_triggered_buffer_cleanup(indio_dev);
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if (id->driver_data == max1118)
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return regulator_disable(adc->reg);
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return 0;
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}
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static const struct spi_device_id max1118_id[] = {
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{ "max1117", max1117 },
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{ "max1118", max1118 },
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{ "max1119", max1119 },
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{}
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};
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MODULE_DEVICE_TABLE(spi, max1118_id);
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#ifdef CONFIG_OF
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static const struct of_device_id max1118_dt_ids[] = {
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{ .compatible = "maxim,max1117" },
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{ .compatible = "maxim,max1118" },
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{ .compatible = "maxim,max1119" },
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{},
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};
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MODULE_DEVICE_TABLE(of, max1118_dt_ids);
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#endif
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static struct spi_driver max1118_spi_driver = {
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.driver = {
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.name = "max1118",
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.of_match_table = of_match_ptr(max1118_dt_ids),
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},
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.probe = max1118_probe,
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.remove = max1118_remove,
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.id_table = max1118_id,
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};
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module_spi_driver(max1118_spi_driver);
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MODULE_AUTHOR("Akinobu Mita <akinobu.mita@gmail.com>");
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MODULE_DESCRIPTION("MAXIM MAX1117/MAX1118/MAX1119 ADCs driver");
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MODULE_LICENSE("GPL v2");
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