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419cc97d36
Current implementation defines clock idle state indicators based on the
cpu information (cpu_is_omap24xx() or cpu_is_omap34xx()) in a system wide
manner. This patch extends the find_idlest() function in clkops to pass
back the idle state indicator for that clock, thus allowing idle state
indicators to be defined on a per clock basis if required.
This is specifically needed on AM35xx devices as the new IPSS clocks
indicates the idle status (0 is idle, 1 is ready) in a way just
opposite to how its handled in OMAP3 (0 is ready, 1 is idle).
Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com>
[paul@pwsan.com: updated to apply after commit 98c45457 et seq.]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
49 lines
1.6 KiB
C
49 lines
1.6 KiB
C
/*
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* arch/arm/plat-omap/include/mach/prcm.h
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*
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* Access definations for use in OMAP24XX clock and power management
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*
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* Copyright (C) 2005 Texas Instruments, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __ASM_ARM_ARCH_OMAP_PRCM_H
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#define __ASM_ARM_ARCH_OMAP_PRCM_H
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u32 omap_prcm_get_reset_sources(void);
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void omap_prcm_arch_reset(char mode);
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int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest,
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const char *name);
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#define START_PADCONF_SAVE 0x2
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#define PADCONF_SAVE_DONE 0x1
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void omap3_prcm_save_context(void);
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void omap3_prcm_restore_context(void);
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u32 prm_read_mod_reg(s16 module, u16 idx);
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void prm_write_mod_reg(u32 val, s16 module, u16 idx);
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u32 prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);
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u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask);
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u32 cm_read_mod_reg(s16 module, u16 idx);
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void cm_write_mod_reg(u32 val, s16 module, u16 idx);
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u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);
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#endif
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