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-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRYuw1AAoJEA0Cl+kVi2xq53MP/Rimo8kL9e/dMrgxqvtQ198N
csKzsAvOFSI69x0VupVOGfMSMDmltIaimyljJO3YrUvy+UOS3irWTHqu1JKq8+HX
oaym2KirVFpGjcll4E2nyeZ18vL8Czt0bNPh2QVuHinwbETtAuq0CBfeAQLWA1Xs
I/bbVKryocLwMNd5iqttSwGVwNZz14ceheliSHkneDeTaZJYQ0nSCLL7qmXncRFl
Z1Xe4aZRTdiU8JZiRN6G3Q2UdhcKRwZPSZrftbVpDRBegnaZp6htUszD2GFX3SJH
lV4ifgh9XVawRPE8Op00lX9fEjGe3EDP5kqqFRqht+mvr15vs2eFNiIIYOyjvBDU
GfCK2Ij2QaUCiIweJOcO5SGkLKYqyVg+G5k7Z5M5FGwwBhEdZRPkZE++9cWG8K/m
ziuJxAl9fK47NwUk4oz15e6JD6gFbEwqYf1f7RdvdRBiclarIuk2rha9BsoeOFM3
LBpGhWW4rcwEH87e0MjkvoopYl4ZHLtiZYk6cEg0rmAxKLvQjdZCZM+A707RG6DC
CZiY6Iu5pSOIz4FweY42mXaANkdBlzn4r7/cPJj7S4umQlkEjYtwXEEziK50lc+g
b7aZEvztQhFDw3lHhFeR44FCy7a1r5NjAZASshHJ72h3xNXrp+9bbugpbkdQVUKj
tpL2eMZQn/lK6T1h8SwE
=JEIy
-----END PGP SIGNATURE-----
Merge tag 'clk-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers
From Kukjin Kim <kgene.kim@samsung.com>:
add suppport common clock framework for exynos
* tag 'clk-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (73 commits)
ARM: EXYNOS: fix compilation error introduced due to common clock migration
clk: exynos5250: Fix divider values for sclk_mmc{0,1,2,3}
clk: exynos4: export clocks required for fimc-is
clk: samsung: Fix compilation error
clk: exynos5250: register display block gate clocks to common clock framework
clk: exynos4: Add support for SoC-specific register save list
clk: exynos4: Add missing registers to suspend save list
clk: exynos4: Remove E4X12 prefix from SRC_DMC register
clk: exynos4: Add E4210 prefix to GATE_IP_PERIR register
clk: exynos4: Add E4210 prefix to LCD1 clock registers
clk: exynos4: Remove SoC-specific registers from save list
clk: exynos4: Use SRC_MASK_PERIL{0,1} definitions
clk: exynos4: Define {E,V}PLL registers
clk: exynos4: Add missing mout_sata on Exynos4210
clk: exynos4: Add missing CMU_TOP and ISP clocks
clk: exynos4: Add G3D clocks
clk: exynos4: Add camera related clock definitions
clk: exynos4: Export mout_core clock of Exynos4210
clk: samsung: Remove unimplemented ops for pll
clk: exynos4: Export clocks used by exynos cpufreq drivers
...
[arnd: add missing #address-cells property in mshc DT node]
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
41 lines
1.4 KiB
Makefile
41 lines
1.4 KiB
Makefile
# common clock types
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obj-$(CONFIG_HAVE_CLK) += clk-devres.o
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obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o
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obj-$(CONFIG_COMMON_CLK) += clk.o
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obj-$(CONFIG_COMMON_CLK) += clk-divider.o
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obj-$(CONFIG_COMMON_CLK) += clk-fixed-factor.o
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obj-$(CONFIG_COMMON_CLK) += clk-fixed-rate.o
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obj-$(CONFIG_COMMON_CLK) += clk-gate.o
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obj-$(CONFIG_COMMON_CLK) += clk-mux.o
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obj-$(CONFIG_COMMON_CLK) += clk-composite.o
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# SoCs specific
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obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o
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obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o
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obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o
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obj-$(CONFIG_ARCH_MXS) += mxs/
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obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/
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obj-$(CONFIG_PLAT_SPEAR) += spear/
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obj-$(CONFIG_ARCH_U300) += clk-u300.o
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obj-$(CONFIG_COMMON_CLK_VERSATILE) += versatile/
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obj-$(CONFIG_ARCH_PRIMA2) += clk-prima2.o
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obj-$(CONFIG_PLAT_ORION) += mvebu/
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ifeq ($(CONFIG_COMMON_CLK), y)
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obj-$(CONFIG_ARCH_MMP) += mmp/
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endif
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obj-$(CONFIG_MACH_LOONGSON1) += clk-ls1x.o
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obj-$(CONFIG_ARCH_SUNXI) += sunxi/
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obj-$(CONFIG_ARCH_U8500) += ux500/
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obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o
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obj-$(CONFIG_ARCH_ZYNQ) += clk-zynq.o
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obj-$(CONFIG_ARCH_TEGRA) += tegra/
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obj-$(CONFIG_PLAT_SAMSUNG) += samsung/
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obj-$(CONFIG_X86) += x86/
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# Chip specific
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obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN) += clk-axi-clkgen.o
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obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
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obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o
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obj-$(CONFIG_CLK_TWL6040) += clk-twl6040.o
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