Catalin Marinas 196adf2f30 arm64: Remove pgprot_dmacoherent() ... Since this macro is identical to pgprot_writecombine() and is only used in a single place, remove it completely to avoid confusion. On ARMv7+ processors, the coherent DMA mapping must be Normal NonCacheable (a.k.a. writecombine) to avoid mismatched hardware attribute aliases (with the kernel linear mapping as Normal Cacheable). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>		2014-03-24 10:35:35 +00:00
..
asm	arm64: Remove pgprot_dmacoherent()	2014-03-24 10:35:35 +00:00
uapi/asm	ARM64: perf: add support for perf registers API	2014-03-13 11:22:37 +00:00