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16e2c7c59f
Move the GPIO and GPIO configuration headers into arch/arm/plat-samsung as they are common to all the Samsung SoCs. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
136 lines
4.3 KiB
C
136 lines
4.3 KiB
C
/* linux/arch/arm/plat-s3c/include/plat/gpio-core.h
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*
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* Copyright 2008 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C Platform - GPIO core
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define GPIOCON_OFF (0x00)
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#define GPIODAT_OFF (0x04)
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#define con_4bit_shift(__off) ((__off) * 4)
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/* Define the core gpiolib support functions that the s3c platforms may
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* need to extend or change depending on the hardware and the s3c chip
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* selected at build or found at run time.
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*
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* These definitions are not intended for driver inclusion, there is
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* nothing here that should not live outside the platform and core
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* specific code.
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*/
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struct s3c_gpio_chip;
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/**
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* struct s3c_gpio_pm - power management (suspend/resume) information
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* @save: Routine to save the state of the GPIO block
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* @resume: Routine to resume the GPIO block.
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*/
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struct s3c_gpio_pm {
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void (*save)(struct s3c_gpio_chip *chip);
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void (*resume)(struct s3c_gpio_chip *chip);
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};
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struct s3c_gpio_cfg;
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/**
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* struct s3c_gpio_chip - wrapper for specific implementation of gpio
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* @chip: The chip structure to be exported via gpiolib.
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* @base: The base pointer to the gpio configuration registers.
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* @config: special function and pull-resistor control information.
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* @pm_save: Save information for suspend/resume support.
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*
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* This wrapper provides the necessary information for the Samsung
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* specific gpios being registered with gpiolib.
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*/
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struct s3c_gpio_chip {
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struct gpio_chip chip;
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struct s3c_gpio_cfg *config;
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struct s3c_gpio_pm *pm;
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void __iomem *base;
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#ifdef CONFIG_PM
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u32 pm_save[4];
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#endif
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};
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static inline struct s3c_gpio_chip *to_s3c_gpio(struct gpio_chip *gpc)
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{
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return container_of(gpc, struct s3c_gpio_chip, chip);
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}
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/** s3c_gpiolib_add() - add the s3c specific version of a gpio_chip.
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* @chip: The chip to register
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*
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* This is a wrapper to gpiochip_add() that takes our specific gpio chip
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* information and makes the necessary alterations for the platform and
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* notes the information for use with the configuration systems and any
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* other parts of the system.
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*/
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extern void s3c_gpiolib_add(struct s3c_gpio_chip *chip);
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/* CONFIG_S3C_GPIO_TRACK enables the tracking of the s3c specific gpios
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* for use with the configuration calls, and other parts of the s3c gpiolib
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* support code.
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*
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* Not all s3c support code will need this, as some configurations of cpu
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* may only support one or two different configuration options and have an
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* easy gpio to s3c_gpio_chip mapping function. If this is the case, then
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* the machine support file should provide its own s3c_gpiolib_getchip()
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* and any other necessary functions.
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*/
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/**
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* samsung_gpiolib_add_4bit_chips - 4bit single register GPIO config.
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* @chip: The gpio chip that is being configured.
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* @nr_chips: The no of chips (gpio ports) for the GPIO being configured.
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*
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* This helper deal with the GPIO cases where the control register has 4 bits
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* of control per GPIO, generally in the form of:
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* 0000 = Input
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* 0001 = Output
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* others = Special functions (dependant on bank)
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*
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* Note, since the code to deal with the case where there are two control
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* registers instead of one, we do not have a seperate set of function
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* (samsung_gpiolib_add_4bit2_chips)for each case.
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*/
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extern void samsung_gpiolib_add_4bit_chips(struct s3c_gpio_chip *chip,
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int nr_chips);
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extern void samsung_gpiolib_add_4bit2_chips(struct s3c_gpio_chip *chip,
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int nr_chips);
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extern void samsung_gpiolib_add_4bit(struct s3c_gpio_chip *chip);
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extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip);
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#ifdef CONFIG_S3C_GPIO_TRACK
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extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
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static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int chip)
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{
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return (chip < S3C_GPIO_END) ? s3c_gpios[chip] : NULL;
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}
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#else
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/* machine specific code should provide s3c_gpiolib_getchip */
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static inline void s3c_gpiolib_track(struct s3c_gpio_chip *chip) { }
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#endif
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#ifdef CONFIG_PM
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extern struct s3c_gpio_pm s3c_gpio_pm_1bit;
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extern struct s3c_gpio_pm s3c_gpio_pm_2bit;
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extern struct s3c_gpio_pm s3c_gpio_pm_4bit;
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#define __gpio_pm(x) x
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#else
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#define s3c_gpio_pm_1bit NULL
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#define s3c_gpio_pm_2bit NULL
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#define s3c_gpio_pm_4bit NULL
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#define __gpio_pm(x) NULL
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#endif /* CONFIG_PM */
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